Información de empaque
| Encapsulado | Pines TSSOP (PW) | 14 |
| Rango de temperatura de funcionamiento (℃) -40 to 125 |
| Cant. de paquetes | Empresa de transporte 3,000 | LARGE T&R |
Características para SN74LV4T00
- Wide operating range of 1.8 V to 5.5 V
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Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
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Up translation:
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1.2 V to 1.8 V
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1.5 V to 2.5 V
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1.8 V to 3.3 V
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3.3 V to 5.0 V
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Down translation:
- 5.0 V, 3.3 V, 2.5 V to 1.8 V
- 5.0 V, 3.3 V to 2.5 V
- 5.0 V to 3.3 V
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- 5.5-V tolerant input pins
- Supports standard pinouts
- Up to 150 Mbps with 5-V or 3.3-V V CC
- Latch-up performance exceeds 250 mA per JESD 17
Descripción de SN74LV4T00
The SN74LV4T00 contains four independent 2-input NAND Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).