Información de empaque
| Encapsulado | Pines HTSSOP (DDW) | 44 |
| Rango de temperatura de funcionamiento (℃) -55 to 125 |
| Cant. de paquetes | Empresa de transporte 35 | TUBE |
Características para TPS7H4003-SEP
- Radiation performance:
- SEL, SEB, and SEGR immune up to LET = 43 MeV-cm2/mg
- SET and SEFI characterized up to LET = 43 MeV-cm2/mg
- TID assured for every wafer lot up to 50 krad(Si)
- Peak efficiency: 94% (VO = 1 V at 100 kHz)
- Integrated 17-mΩ and 9-mΩ MOSFETs
- Power rail: 3 V to 7 V on VIN
- Flexible switching frequency options:
- 100-kHz to 1-MHz adjustable internal oscillator
- External sync capability: 100kHz to 1MHz
- SYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to 4 devices
- 0.6-V ±1.7% voltage reference over temperature, radiation, and line and load regulation
- Monotonic start-up into prebiased outputs
- Adjustable slope compensation and soft-start
- Adjustable input enable and power-good output for power sequencing
- 44-pin PowerPAD™ HTSSOP package
- Space Enhanced
Plastic:
- Controlled baseline
- Au bondwire and NiPdAu lead finish
- Enhanced mold compound for low outgassing
- One fabrication, assembly, and test site
- Extended product life cycle
- Extended product change notification
- Product traceability
Descripción de TPS7H4003-SEP
The TPS7H4003-SEP is a radiation-tolerant, 7-V, 18-A synchronous buck converter with integrated low-resistance high-side and low-side MOSFETs in a thermally enhanced 34-pin ceramic flatpack package. High efficiency and reduced component count are achieved through current mode control.
The output voltage start-up ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is possible by correctly configuring the enable and the power good pins. The TPS7H4003-SEP can be configured in primary-secondary mode and with the SYNC2 pin, four devices can be configured in parallel without an external clock.
Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current protection which prevents current runaway. There is also a low-side sinking current protection which turns off the low-side MOSFET to prevent excessive reverse current. Thermal shutdown disables the part when die temperature exceeds thermal limit.