인터페이스 이더넷 IC 이더넷 리타이머, 리드라이버 및 멀티플렉서 버퍼

DS280BR810

활성

28Gbps 저전력 8채널 선형 리드라이버

제품 상세 정보

Type Redriver Number of channels 8 Input compatibility CML Speed (max) (Gbpp) 28.125 Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
Type Redriver Number of channels 8 Input compatibility CML Speed (max) (Gbpp) 28.125 Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
NFBGA (ZBF) 135 104 mm² 13 x 8
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28-Gbps Interfaces
  • Low Power Consumption: 93 mW and Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of CR4/KR4 Link Training
  • Extends Channel Reach by 15 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX and TX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28-Gbps Interfaces
  • Low Power Consumption: 93 mW and Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of CR4/KR4 Link Training
  • Extends Channel Reach by 15 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX and TX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range

The DS280BR810 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for front-port, backplane, and chip-to-chip applications.

The linear nature of the DS280BR810’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100 G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR810 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR810’s small package dimensions, optimized high-speed signal escape, and the pin-compatible retimer portfolio make the DS280BR810 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100 G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP28, SFP28, CFP2/CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX and TX) eliminate the need for external capacitors on the PCB. The DS280BR810 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible retimer device is available for longer reach applications.

The DS280BR810 can be configured either via the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

The DS280BR810 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for front-port, backplane, and chip-to-chip applications.

The linear nature of the DS280BR810’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100 G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR810 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR810’s small package dimensions, optimized high-speed signal escape, and the pin-compatible retimer portfolio make the DS280BR810 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100 G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP28, SFP28, CFP2/CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX and TX) eliminate the need for external capacitors on the PCB. The DS280BR810 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible retimer device is available for longer reach applications.

The DS280BR810 can be configured either via the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

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추가 정보 요청

IBIS AMI 모델 및 장치 GUI 프로필을 사용할 수 있습니다. 지금 요청

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
DS280BR820 활성 28Gbps 저전력 8채널 선형 리드라이버 Enhanced performance pin-to-pin upgrade

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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6개 모두 보기
유형 직함 날짜
* Data sheet DS280BR810 Low Power 28 Gbps 8 Channel Linear Repeater datasheet (Rev. C) PDF | HTML 2019/10/02
Application note Implementing Pin Compatible Ethernet Redrivers and Retimers PDF | HTML 2024/10/28
Application note Optimal Implementation of 25G-28G Ethernet Retimers versus Redrivers (Rev. B) PDF | HTML 2023/05/01
More literature Advanced Signal Conditioning Made Easy and Efficient 2017/01/12
Technical article Designing a 25G system: 5 tips to balance power, performance and price PDF | HTML 2016/02/01
Application note Understanding EEPROM Programming for 25G and 28G Repeaters and Retimers 2016/01/13

설계 및 개발

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평가 보드

DS280BR820EVM — DS280BR820 28Gbps 8채널 선형 리피터 평가 모듈

The DS280BR820EVM allows for easy evaluation of the DS280BR820 28 Gbps  8-channel linear repeater. To use this EVM, supply power (2.5V or 3.3V) via standard banana connectors and high-speed traffic via Huber+Suhner 1x8 MXP connectors. Huber+Suhner cable assemblies are not included.

Through the (...)

사용 설명서: PDF
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시뮬레이션 툴

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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레퍼런스 디자인

TIDA-00427 — 2포트 100GbE/40GbE/10GbE QSFP28 신호 조절기 레퍼런스 디자인

This verified reference design is a signal conditioning solution for front-port QSFP28 supporting two 100GbE ports compatible with 100G-CR4/SR4/LR4, 40G-CR4/SR4/LR4 and 10G SFF-8431 requirements. The design is applicable to optical and passive/active copper cables. It allows for reach extension (...)
Design guide: PDF
회로도: PDF
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NFBGA (ZBF) 135 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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