인터페이스 I2C & I3C ICs I2C & I3C level shifters, buffers & hubs

TCA9509

활성

내부 1mA 전류 소스를 지원하는 2비트 레벨 변환 400kHz I2C/SMBus 버퍼/리피터

제품 상세 정보

Features Buffer, Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 0.9 VCCA (max) (V) 5.5 VCCB (min) (V) 2.7 VCCB (max) (V) 5.5 Supply restrictions VCCA <= (VCCB-1) Rating Catalog Operating temperature range (°C) -40 to 85
Features Buffer, Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 0.9 VCCA (max) (V) 5.5 VCCB (min) (V) 2.7 VCCB (max) (V) 5.5 Supply restrictions VCCA <= (VCCB-1) Rating Catalog Operating temperature range (°C) -40 to 85
VSSOP (DGK) 8 14.7 mm² 3 x 4.9 X2QFN (RVH) 8 2.56 mm² 1.6 x 1.6
  • Two-channel bidirectional buffer
  • I2C bus and SMBus compatible
  • Operating supply voltage range of 2.7V to 5.5V on B side
  • Operating voltage range of 0.9V to 5.5V on A side
  • Voltage-level translation from 0.9V to 5.5V and 2.7V to 5.5V
  • Active-high repeater-enable input
  • Requires no external pullup resistors on lower-voltage port-A
  • Open-drain I2C I/O
  • 5.5-V Tolerant I2C and enable input support mixed-mode signal operation
  • Lockup-free operation
  • Accommodates standard mode and fast mode I2C devices and multiple controllers
  • Supports arbitration and clock stretching across Repeater
  • Powered-off high-impedance I2C bus pins
  • Supports 400-kHz fast I2C bus operating speeds
  • Available in
    • 1.6mm × 1.6mm, 0.4mm height, 0.5mm pitch QFN package
    • 3mm × 3mm Industry standard MSOP package
  • Latch-up performance exceeds 100mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V Human-body model (A114-A)
    • 1000V Charged-device model (C101)
  • Two-channel bidirectional buffer
  • I2C bus and SMBus compatible
  • Operating supply voltage range of 2.7V to 5.5V on B side
  • Operating voltage range of 0.9V to 5.5V on A side
  • Voltage-level translation from 0.9V to 5.5V and 2.7V to 5.5V
  • Active-high repeater-enable input
  • Requires no external pullup resistors on lower-voltage port-A
  • Open-drain I2C I/O
  • 5.5-V Tolerant I2C and enable input support mixed-mode signal operation
  • Lockup-free operation
  • Accommodates standard mode and fast mode I2C devices and multiple controllers
  • Supports arbitration and clock stretching across Repeater
  • Powered-off high-impedance I2C bus pins
  • Supports 400-kHz fast I2C bus operating speeds
  • Available in
    • 1.6mm × 1.6mm, 0.4mm height, 0.5mm pitch QFN package
    • 3mm × 3mm Industry standard MSOP package
  • Latch-up performance exceeds 100mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V Human-body model (A114-A)
    • 1000V Charged-device model (C101)

This TCA9509 integrated circuit is an I2C bus/SMBus Repeater for use in I2C/SMBus systems. It can also provide bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9509 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing 400pF bus capacitance on the B-side. This device can also be used to isolate two halves of a bus for voltage and capacitance.

The TCA9509 has two types of drivers – A-side drivers and B-side drivers. All inputs and B-side I/Os are overvoltage tolerant to 5.5V. The A-side I/Os are overvoltage tolerant to 5.5V when the device is unpowered (VCCB and/or VCCA = 0 V).

The bus port B drivers are compliant with SMBus I/O levels, while the A-side uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. The A-side uses a 1 mA current source for pull-up and a 200Ω pull-down driver. This results in a LOW on the A-side accommodating smaller voltage swings. The output pull-down on the A-side internal buffer LOW is set for approximately 0.2V, while the input threshold of the internal buffer is set about 50mV lower than that of the output voltage LOW. When the A-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the B-side drives a hard LOW and the input level is set at 0.3 of SMBus or I2C-bus voltage level which enables B side to connect to any other I2C-bus devices or buffer.

The TCA9509 drivers are not enabled unless VCCA is above 0.8V and VCCB is above 2.5V. The enable (EN) pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the EN pin when the bus is idle.

This TCA9509 integrated circuit is an I2C bus/SMBus Repeater for use in I2C/SMBus systems. It can also provide bidirectional voltage-level translation (up-translation/down-translation) between low voltages (down to 0.9V) and higher voltages (2.7V to 5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9509 buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, thus allowing 400pF bus capacitance on the B-side. This device can also be used to isolate two halves of a bus for voltage and capacitance.

The TCA9509 has two types of drivers – A-side drivers and B-side drivers. All inputs and B-side I/Os are overvoltage tolerant to 5.5V. The A-side I/Os are overvoltage tolerant to 5.5V when the device is unpowered (VCCB and/or VCCA = 0 V).

The bus port B drivers are compliant with SMBus I/O levels, while the A-side uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. The A-side uses a 1 mA current source for pull-up and a 200Ω pull-down driver. This results in a LOW on the A-side accommodating smaller voltage swings. The output pull-down on the A-side internal buffer LOW is set for approximately 0.2V, while the input threshold of the internal buffer is set about 50mV lower than that of the output voltage LOW. When the A-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the B-side drives a hard LOW and the input level is set at 0.3 of SMBus or I2C-bus voltage level which enables B side to connect to any other I2C-bus devices or buffer.

The TCA9509 drivers are not enabled unless VCCA is above 0.8V and VCCB is above 2.5V. The enable (EN) pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the EN pin when the bus is idle.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
TCA9803 활성 내부 3mA 전류 소스를 지원하는 2비트 레벨 변환 400kHz I2C/SMBus 버퍼/리피터 This pin-to-pin device has improved performance (better signal integrity, faster rise times, slew rate control) and reduces external components required

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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8개 모두 보기
유형 직함 날짜
* Data sheet TCA9509 Level-Translating I2 C and SMBUS Bus Repeater datasheet (Rev. E) PDF | HTML 2024/10/30
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/07/03
Application note Resolving Improper Implementation of the Static Voltage Offset on I2C Buffers PDF | HTML 2023/10/09
Application note Why, When, and How to use I2C Buffers 2018/05/23
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 2016/09/07
Application note Understanding the I2C Bus PDF | HTML 2015/06/30
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015/05/15
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015/02/13

설계 및 개발

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시뮬레이션 모델

TCA9509 IBIS Model

SLPM022.ZIP (75 KB) - IBIS Model
설계 툴

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PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
VSSOP (DGK) 8 Ultra Librarian
X2QFN (RVH) 8 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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