TCA9617B
- Two-channel bidirectional I2C buffer
- Support for standard mode, fast mode (400kHz), and fast mode+ (1MHz) I2C operation
- Operating supply voltage range of 0.8V to 5.5V on A-side
- Operating supply voltage range of 2.2V to 5.5V on B-side
- Voltage-level translation from 0.8V to 5.5V and 2.2V to 5.5V
- Footprint and function replacement for TCA9517
- Active-high repeater-enable input
- Open-drain I2C I/O
- 5.5V Tolerant I2C and enable input support
- Lockup-free operation
- Powered-off high-impedance I2C bus pins
- Support for clock stretching and multiple controller arbitration across the device
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 4000V Human-body model
- 1500V Charged-device model
The TCA9617B is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. The device provides bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8V) and higher voltages(2.2V to 5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.
The TCA9617B buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550pF to be connected in an I2C application. This device can also be used to separate two halves of a bus for voltage and capacitance.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TCA9617B Level-Translating FM+ I2 C Bus Repeater datasheet (Rev. E) | PDF | HTML | 2024/10/02 |
Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/07/03 | |
Application note | Why, When, and How to use I2C Buffers | 2018/05/23 | ||
Technical article | Intro to I2C: what the Internet doesn’t tell you | PDF | HTML | 2016/11/24 | |
Application note | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016/09/07 | |
Selection guide | I2C Infographic Flyer | 2015/12/03 | ||
Technical article | How to simplify I2C tree when connecting multiple slaves to an I2C master | PDF | HTML | 2015/10/15 | |
Application note | Understanding the I2C Bus | PDF | HTML | 2015/06/30 | |
Application note | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015/05/15 | ||
Application note | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015/02/13 |
설계 및 개발
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I2C-DESIGNER — I2C 디자이너 툴
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VSSOP (DGK) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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