전원 관리 게이트 드라이버 저압측 드라이버

UCC27611

활성

4V UVLO 및 5V 조정 출력을 지원하는 4A/6A 싱글 채널 게이트 드라이버

제품 상세 정보

Number of channels 1 Power switch GaNFET, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Regulated gate driver voltage, Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 4 Propagation delay time (µs) 0.014 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Low Side
Number of channels 1 Power switch GaNFET, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Regulated gate driver voltage, Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 4 Propagation delay time (µs) 0.014 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Low Side
WSON (DRV) 6 4 mm² 2 x 2
  • Enhancement Mode Gallium Nitride FETs (eGANFETs)
  • 4-V to 18-V Single Supply Range VDD Range
  • Drive Voltage VREF Regulated to 5 V
  • 4-A Peak Source and 6-A Peak Sink Drive Current
  • 1-Ω and 0.35-Ω Pullup and Pulldown Resistance (Maximize High Slew-Rate dV and dt Immunity)
  • Split Output Configuration (Allows Turnon and Turnoff Optimization for Individual FETs)
  • Fast Propagation Delays (14-ns Typical)
  • Fast Rise and Fall Times (9-ns and 5-ns Typical)
  • TTL and CMOS Compatible Inputs (Independent of Supply Voltage Allow Easy Interface-to-Digital and Analog Controllers)
  • Dual-Input Design Offering Drive Flexibility (Both Inverting and Noninverting Configurations)
  • Output Held Low When Inputs Are Floating
  • VDD Under Voltage Lockout (UVLO)
  • Optimized Pinout Compatible With eGANFET Footprint for Easy Layout
  • 2.00 mm × 2.00 mm SON-6 Package With Exposed Thermal and Ground Pad, (Minimized Parasitic Inductances to Reduce Gate Ringing)
  • Operating Temperature Range of –40°C to 140°C
  • Enhancement Mode Gallium Nitride FETs (eGANFETs)
  • 4-V to 18-V Single Supply Range VDD Range
  • Drive Voltage VREF Regulated to 5 V
  • 4-A Peak Source and 6-A Peak Sink Drive Current
  • 1-Ω and 0.35-Ω Pullup and Pulldown Resistance (Maximize High Slew-Rate dV and dt Immunity)
  • Split Output Configuration (Allows Turnon and Turnoff Optimization for Individual FETs)
  • Fast Propagation Delays (14-ns Typical)
  • Fast Rise and Fall Times (9-ns and 5-ns Typical)
  • TTL and CMOS Compatible Inputs (Independent of Supply Voltage Allow Easy Interface-to-Digital and Analog Controllers)
  • Dual-Input Design Offering Drive Flexibility (Both Inverting and Noninverting Configurations)
  • Output Held Low When Inputs Are Floating
  • VDD Under Voltage Lockout (UVLO)
  • Optimized Pinout Compatible With eGANFET Footprint for Easy Layout
  • 2.00 mm × 2.00 mm SON-6 Package With Exposed Thermal and Ground Pad, (Minimized Parasitic Inductances to Reduce Gate Ringing)
  • Operating Temperature Range of –40°C to 140°C

The UCC27611 is a single-channel, high-speed, gate driver optimized for 5-V drive, specifically addressing enhancement mode GaN FETs. The drive voltage VREF is precisely controlled by internal linear regulator to 5 V. The UCC27611 offers asymmetrical rail-to-rail peak current drive capability with 4-A source and 6-A sink. Split output configuration allows individual turnon and turnoff time optimization depending on FET. Package and pinout with minimum parasitic inductances reduce the rise and fall time and limit the ringing. Additionally, the short propagation delay with minimized tolerances and variations allows efficient operation at high frequencies. The 1-Ω and 0.35-Ω resistance boosts immunity to hard switching with high slew rate dV and dt.

The independence from VDD input signal thresholds ensure TTL and CMOS low-voltage logic compatibility. For safety reason, when the input pins are in a floating condition, the internal input pullup and pulldown resistors hold the output LOW. Internal circuitry on VREF pin provides an undervoltage lockout function that holds output LOW until VREF supply voltage is within operating range. UCC27611 is offered in a small 2.00 mm × 2.00 mm SON-6 package (DRV) with exposed thermal and ground pad that improves the package power-handling capability. The UCC27611 operates over wide temperature range from –40°C to 140°C.

The UCC27611 is a single-channel, high-speed, gate driver optimized for 5-V drive, specifically addressing enhancement mode GaN FETs. The drive voltage VREF is precisely controlled by internal linear regulator to 5 V. The UCC27611 offers asymmetrical rail-to-rail peak current drive capability with 4-A source and 6-A sink. Split output configuration allows individual turnon and turnoff time optimization depending on FET. Package and pinout with minimum parasitic inductances reduce the rise and fall time and limit the ringing. Additionally, the short propagation delay with minimized tolerances and variations allows efficient operation at high frequencies. The 1-Ω and 0.35-Ω resistance boosts immunity to hard switching with high slew rate dV and dt.

The independence from VDD input signal thresholds ensure TTL and CMOS low-voltage logic compatibility. For safety reason, when the input pins are in a floating condition, the internal input pullup and pulldown resistors hold the output LOW. Internal circuitry on VREF pin provides an undervoltage lockout function that holds output LOW until VREF supply voltage is within operating range. UCC27611 is offered in a small 2.00 mm × 2.00 mm SON-6 package (DRV) with exposed thermal and ground pad that improves the package power-handling capability. The UCC27611 operates over wide temperature range from –40°C to 140°C.

다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
21개 모두 보기
유형 직함 날짜
* Data sheet UCC27611 5-V, 4-A to 6-A Low Side GaN Driver datasheet (Rev. F) PDF | HTML 2018/03/12
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024/01/22
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023/09/08
Application brief GaN Applications PDF | HTML 2022/08/10
Application brief GaN Driver Schematic and Layout Recommendations PDF | HTML 2022/08/10
Application brief Key Parameters and Driving Requirements of GaN FETs PDF | HTML 2022/08/04
Application brief Nomenclature, Types, and Structure of GaN Transistors PDF | HTML 2022/08/04
Application brief How GaN Enables More Efficient and Reduced Form Factor Power Supplies PDF | HTML 2022/08/02
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021/11/10
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/02/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/02/28
Application note GaN Gate Driver Layout Help 2019/05/23
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019/01/18
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018/10/29
Application brief Enable Function with Unused Differential Input 2018/07/11
Selection guide Power Management Guide 2018 (Rev. R) 2018/06/25
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018/03/16
Technical article How to achieve higher system efficiency- part two: high-speed gate drivers PDF | HTML 2017/01/31
White paper A comprehensive methodology to qualify the reliability of GaN products 2015/03/02
White paper Advancing Power Supply Solutions Through the Promise of GaN 2015/02/24
EVM User's guide Using the UCC27611OLEVM-203 2012/11/29

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

LMG1020EVM-006 — LMG1020 GaN 저압측 드라이버 + GaN FET LiDAR 평가 모듈

The LMG1020EVM-006 is a small, easy-to-use power stage for LIDAR laser drive. The EVM includes an integrated resistive load, (laser not included) and takes a short-pulse input that can either be buffered (and shortened further), or passed directly to the power stage. The board can demonstrate (...)
사용 설명서: PDF
TI.com에서 구매 불가
평가 보드

UCC27611OLEVM-203 — UCC27611 게이트 드라이버 오픈 루프 평가 모듈

The UCC27611OLEVM-203 aids in the evaluation of high-speed, single channel, low-side driver capable of driving eGANFETs with a regulated 5-V optimized output. The EVM is designed to drive a capacitive load on the output of the UCC27611 device, with connectors provided to offer flexibility to bring (...)
사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

UCC27611 PSpice Transient Model (Rev. C)

SLUM339C.ZIP (45 KB) - PSpice Model
시뮬레이션 모델

UCC27611 TINA-TI Transient Reference Design (Rev. E)

SLUM362E.TSC (761 KB) - TINA-TI Reference Design
시뮬레이션 모델

UCC27611 TINA-TI Transient Spice Model (Rev. B)

SLUM363B.ZIP (5 KB) - TINA-TI Spice Model
시뮬레이션 모델

UCC27611 Unencrypted PSpice Transient Model (Rev. B)

SLUM487B.ZIP (2 KB) - PSpice Model
계산 툴

SLURB16 UCC27611 Schematic Review Template

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
저압측 드라이버
UCC27611 4V UVLO 및 5V 조정 출력을 지원하는 4A/6A 싱글 채널 게이트 드라이버
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
레퍼런스 디자인

PMP22951 — 능동 클램프 참조 설계를 적용한 54V, 3kW 위상 변이 풀 브리지

레퍼런스 설계는 GaN 기반 3kW 위상 변환 풀 브리지(PSFB) 컨버터입니다. 이 설계에서는 동기식 정류기(SR) MOSFET에 대한 전압 응력을 최소화하기 위해 이차측에 액티브 클램프를 사용하며, 그에 따라 FOM(figure-of-merit)이 더 우수한, 상대적으로 낮은 전압 정격 MOSFET을 활용할 수 있습니다. PMP22951은 일차측에서 30mΩ GaN을 사용하고, 동기식 정류기용으로 100V, 1.8mΩ GaN을 사용합니다. PSFB 제어는 TMS320F280049C 실시간 마이크로컨트롤러를 사용해 구현합니다. (...)
Test report: PDF
레퍼런스 디자인

TIDA-00785 — 절연 GaN 드라이버 레퍼런스 설계

This reference design consists of a reinforced dualchannel digital isolator, a GaN gate driver, and isolated power supplies. This compact reference design is intended to control GaN in power supplies, DC-to-DC converters, synchronous rectification, solar inverters, and motor control. An open-loop (...)
Design guide: PDF
회로도: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
WSON (DRV) 6 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상