首頁 介面 乙太網路 IC 乙太網路 PHY
首頁
介面
乙太網路 IC
乙太網路 PHY
最新

DP83TC818S-Q1

預覽

具有 MACsec、進階 TSN、AVB 功能和 TC-10 的車用 100BASE-T1 乙太網路 PHY

立即訂購
產品規格表

DP83TC818S-Q1

預覽
產品規格表 立即訂購

產品詳細資料

Datarate (Mbps) 100BASE-T1 Interface type MII, RGMII, RMII, SGMII Number of ports Single Rating Automotive Features 25-MHz clock out, Cable diagnostics, IEEE 1588v2/802.1AS time synchronization and AVB clock generation, IEEE 802.1AE MACsec, IEEE 802.3bw & Open Alliance (OA) compliant, Integrated LPF, Single supply, TC10, Wettable flank package I/O supply voltage (typ) (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 125 Number of LEDs 2 ESD HBM (kV) 8
Datarate (Mbps) 100BASE-T1 Interface type MII, RGMII, RMII, SGMII Number of ports Single Rating Automotive Features 25-MHz clock out, Cable diagnostics, IEEE 1588v2/802.1AS time synchronization and AVB clock generation, IEEE 802.1AE MACsec, IEEE 802.3bw & Open Alliance (OA) compliant, Integrated LPF, Single supply, TC10, Wettable flank package I/O supply voltage (typ) (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 125 Number of LEDs 2 ESD HBM (kV) 8
VQFN (RHA) 36 36 mm² 6 x 6
  • IEEE 802.1AE MACsec
    • MACsec frame expansion: Inbuilt buffering and flow control support to handle 12 byte IPG ethernet frames
    • Authentication, encryption at line rate
    • Cipher suites: GCM-AES-XPN-128/256, GCM-AES-128/256
    • Secure Channel: Total 16 SAK enabling 8 Tx/Rx SC
    • Auto rollover support for SAK
    • Ingress/Egress classification for Ethertype, VLAN, DMAC: up to 8 parallel rules
    • Window replay protection
  • IEEE 802.1AS time synchronization & fractional clock generation
    • Highly accurate 1pps signal < +/-5 ns
    • Precise time stamping for MACsec encoded PTP packets
    • I2S & TDM8 SCLK/FSYNC clock generation
    • Mulitple IOs for event capture and trigger
  • IEEE 802.3bw & OA 100BASE-T1 compliant
  • TC-10 compliant
    • < 20µA sleep current
    • Fast wake from sleep by retaining PHY configuration during sleep (optional)
  • MAC Interfaces: MII, RMII, RGMII, SGMII
  • Pin compatible with TI’s 1000BASE-T1 PHY
    • Single board design for 100BASE-T1 and 1000BASE-T1 with required BOM change
  • Diagnostic tool kit
    • Signal Quality Indication (SQI) & Time Domain Reflectometry (TDR)
    • Voltage, Temperature & ESD sensors
  • AEC-Q10 qualified for Automotive Applications:
    • Temperature grade 1: –40°C to +125 °C
  • IEEE 802.1AE MACsec
    • MACsec frame expansion: Inbuilt buffering and flow control support to handle 12 byte IPG ethernet frames
    • Authentication, encryption at line rate
    • Cipher suites: GCM-AES-XPN-128/256, GCM-AES-128/256
    • Secure Channel: Total 16 SAK enabling 8 Tx/Rx SC
    • Auto rollover support for SAK
    • Ingress/Egress classification for Ethertype, VLAN, DMAC: up to 8 parallel rules
    • Window replay protection
  • IEEE 802.1AS time synchronization & fractional clock generation
    • Highly accurate 1pps signal < +/-5 ns
    • Precise time stamping for MACsec encoded PTP packets
    • I2S & TDM8 SCLK/FSYNC clock generation
    • Mulitple IOs for event capture and trigger
  • IEEE 802.3bw & OA 100BASE-T1 compliant
  • TC-10 compliant
    • < 20µA sleep current
    • Fast wake from sleep by retaining PHY configuration during sleep (optional)
  • MAC Interfaces: MII, RMII, RGMII, SGMII
  • Pin compatible with TI’s 1000BASE-T1 PHY
    • Single board design for 100BASE-T1 and 1000BASE-T1 with required BOM change
  • Diagnostic tool kit
    • Signal Quality Indication (SQI) & Time Domain Reflectometry (TDR)
    • Voltage, Temperature & ESD sensors
  • AEC-Q10 qualified for Automotive Applications:
    • Temperature grade 1: –40°C to +125 °C

The DP83TC818S-Q1 device is an IEEE 802.3bw automotive Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data, and xMII interface flexibility. DP83TC818S-Q1 is compliant to Open Alliance EMC and interoperable specifications over unshielded single twisted-pair cable. DP83TC818S-Q1 supports OA TC-10 low power sleep feature with wake forwarding for reduced system power consumption when communication is not required.

The DP83TC818S-Q1 integrates IEEE 802.1AE line rate security with authentication and optional encryption support, to secure communication over the network. The DP83TC818S-Q1 supports up to 16 secure association (SA) channels with automatic SAK rollover and extended packet numbering support. DP83TC818S-Q1 offers ingress classification to filter the unwanted packets & supports WAN MACsec for end-to-end security.

DP83TC818S-Q1 integrates IEEE 1588v2/802.1AS hardware time stamping & fractional PLL, enabling highly accurate time synchronization. The fractional PLL enables frequency and phase synchronization of the wall clock (eliminating the need for external VCXO) and generation of a wide range of time synchronized frequencies needed for audio and other ADAS applications. The PHY also integrates IEEE 1722 CRF decode to generate Media clock and Bit Clock for AVB & other audio applications.

The DP83TC818S-Q1 device is an IEEE 802.3bw automotive Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data, and xMII interface flexibility. DP83TC818S-Q1 is compliant to Open Alliance EMC and interoperable specifications over unshielded single twisted-pair cable. DP83TC818S-Q1 supports OA TC-10 low power sleep feature with wake forwarding for reduced system power consumption when communication is not required.

The DP83TC818S-Q1 integrates IEEE 802.1AE line rate security with authentication and optional encryption support, to secure communication over the network. The DP83TC818S-Q1 supports up to 16 secure association (SA) channels with automatic SAK rollover and extended packet numbering support. DP83TC818S-Q1 offers ingress classification to filter the unwanted packets & supports WAN MACsec for end-to-end security.

DP83TC818S-Q1 integrates IEEE 1588v2/802.1AS hardware time stamping & fractional PLL, enabling highly accurate time synchronization. The fractional PLL enables frequency and phase synchronization of the wall clock (eliminating the need for external VCXO) and generation of a wide range of time synchronized frequencies needed for audio and other ADAS applications. The PHY also integrates IEEE 1722 CRF decode to generate Media clock and Bit Clock for AVB & other audio applications.
filter 尋找其它 乙太網路 PHY
下載 觀看有字幕稿的影片 影片
索取更多資訊

提供完整產品規格表及其他資源。立即索取

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 2
類型 標題 日期
* Data sheet DP83TC818S-Q1 Precise and Secure 100BASE-T1 Automotive Ethernet with TC10, IEEE802.1AS, IEEE802.1AE MACsec and AVB Clock Generation datasheet PDF | HTML 2024年 5月 29日
Application note SGMII Troubleshooting Guide PDF | HTML 2024年 11月 5日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DP83TC818EVM-MC — DP83TC818S-Q1 評估模型

DP83TC818EVM-MC 支援 100 Mbps 速度，且符合 IEEE 802.3bp 規範。板載 MSP430F5529 可與 USB2MDIO 圖形使用者介面工具搭配使用。提供 DP83867 以使用 RGMII MAC 介面支援銅線 (100BASE-TX)。

要求
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
View Options
參考設計

TIDA-020071 — TDA4 四路車用 PHY RGMII 參考設計

此參考設計透過 RGMII 乙太網路擴充連接器介接 Jacinto™ 7 處理器 EVM 板。藉由 TI 汽車乙太網路實體層 (PHY) 新增四個汽車乙太網路。設計採用 TI 的 DP83TC818S-Q1 100Mbps/s 與 DP83TG721S-Q1 1000Mbps 單對乙太網路 (SPE) PHY。使用耦合網路，以 12V 耦合至數據線。
Design guide: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHA) 36 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片