首頁 介面 乙太網路 IC 乙太網路重定時器、訊號調節器和多工器緩衝器

DS280BR820

現行

28-Gbps 低功耗 8 通道轉接驅動器

產品詳細資料

Type Redriver Number of channels 8 Input compatibility CML Speed (max) (Gbps) 28.125 Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
Type Redriver Number of channels 8 Input compatibility CML Speed (max) (Gbps) 28.125 Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
NFBGA (ZBL) 135 104 mm² 13 x 8
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

下載 觀看有字幕稿的影片 影片
Special note

To request IBIS AMI models, and device GUI profile: Request DS280BR820

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 5
類型 標題 日期
* Data sheet DS280BR820 Low Power 28 Gbps 8 Channel Linear Repeater datasheet (Rev. B) PDF | HTML 2019年 10月 3日
Application note Optimal Implementation of 25G-28G Ethernet Retimers versus Redrivers (Rev. B) PDF | HTML 2023年 5月 1日
EVM User's guide DS280BR810EVM User's Guide (Rev. B) 2019年 9月 3日
More literature Advanced Signal Conditioning Made Easy and Efficient 2017年 1月 12日
Application note Understanding EEPROM Programming for 25G and 28G Repeaters and Retimers 2016年 1月 13日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DS280BR820EVM — DS280BR820 28 Gbps 8 通道線性中繼器評估模組

The DS280BR820EVM allows for easy evaluation of the DS280BR820 28 Gbps  8-channel linear repeater. To use this EVM, supply power (2.5V or 3.3V) via standard banana connectors and high-speed traffic via Huber+Suhner 1x8 MXP connectors. Huber+Suhner cable assemblies are not included.

Through the (...)

使用指南: PDF
TI.com 無法提供
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDA-00427 — 雙埠 100GbE/40GbE/10GbE QSFP28 訊號調節器參考設計

This verified reference design is a signal conditioning solution for front-port QSFP28 supporting two 100GbE ports compatible with 100G-CR4/SR4/LR4, 40G-CR4/SR4/LR4 and 10G SFF-8431 requirements. The design is applicable to optical and passive/active copper cables. It allows for reach extension (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (ZBL) 135 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片