DS90UR907Q-Q1
- 5-MHz to 65-MHz Support (140-Mbps to 1.82-
Gbps Serial Link) - 5-Channel (4 data + 1 clock) FPD-Link Receiver
Inputs - AC-Coupled STP Interconnect up to 10 Meters in
Length - Integrated Output Termination
- At Speed Link BIST Mode
- Optional I2C Compatible Serial Control Bus
- RGB888 + VS, HS, DE support
- Power-Down Mode Minimizes Power Dissipation
- Randomizer/Scrambler – DC-Balanced Data
Stream - Low EMI FPD-Link Input
- Selectable Output VOD and Adjustable De-
Emphasis - 1.8-V or 3.3-V Compatible Control Bus Interface
- Automotive Grade Product: AEC-Q100 Grade 2
Qualified - >8-kV HBM and ISO 10605 ESD Rating
- Backward Compatible Mode for Operation With
Older Generation Devices
The DS90UR907Q-Q1 converts FPD-Link to FPD-Link II. It translates four LVDS data/control streams and one LVDS clock pair (FPD-Link) into a high-speed serialized interface (FPD-Link II) over a single pair. This serial bus scheme greatly eases system design by eliminating skew problems between clock and data, reduces the number of connector pins, reduces the interconnect size, weight, and cost, and overall eases PCB layout. In addition, internal DC balanced encoding is used to support AC-coupled interconnects.
The DS90UR907Q-Q1 converts, balances and level shifts four LVDS data/control streams, and embeds one LVDS clock pair (FPD-Link) to a serial stream (FPD-Link II). Up to 24 bits of RGB in the FPD-Link are serialized along with the three video control signals.
Serial transmission is optimized by a user selectable de-emphasis and differential output level select features. EMI is minimized by the use of low voltage differential signaling and spread spectrum clocking compatibility.
With fewer wires to the physical interface of the host, FPD-Link input with LVDS technology is ideal for high speed, low power and low EMI data transfer.
The device is offered in a 36-pin WQFN package and is specified over the automotive AEC-Q100 Grade 2 temperature range of –40°C to 105°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS90UR907Q-Q1 5 to 65-MHz, 24-Bit Color FPD-Link to FPD-Link II Converter datasheet (Rev. G) | PDF | HTML | 2015年 12月 31日 |
| Application note | LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) | 2013年 4月 29日 | ||
| Application note | AN-1807 FPD-Link II Display SerDes Overview (Rev. B) | 2013年 4月 26日 | ||
| Application note | Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A) | 2013年 4月 26日 | ||
| User guide | DS90UR907Q-EVK FPD-Link to FPD-Link II Converter Evaluation Kit | 2012年 1月 26日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJK) | 36 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。