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REF6045

現行

具有整合式緩衝器和賦能針腳的 4.5-V、5-ppm/°C 高精密度電壓參考

立即訂購
產品規格表

REF6045

現行
產品規格表 立即訂購

產品詳細資料

VO (V) 4.5 Initial accuracy (max) (%) 0.05 Temp coeff (max) (ppm/°C) 5 Vin (min) (V) 4.75 Vin (max) (V) 5.5 Iq (typ) (mA) 0.83 Rating Catalog Features Integrated low-output impedance buffer LFN 0.1 to 10 Hz (typ) (µVPP) 13.5 Iout/Iz (max) (mA) 3.5 Operating temperature range (°C) -40 to 125 Shutdown current (ISD) (typ) (µA) 1
VO (V) 4.5 Initial accuracy (max) (%) 0.05 Temp coeff (max) (ppm/°C) 5 Vin (min) (V) 4.75 Vin (max) (V) 5.5 Iq (typ) (mA) 0.83 Rating Catalog Features Integrated low-output impedance buffer LFN 0.1 to 10 Hz (typ) (µVPP) 13.5 Iout/Iz (max) (mA) 3.5 Operating temperature range (°C) -40 to 125 Shutdown current (ISD) (typ) (µA) 1
VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Excellent Temperature Drift Performance
    • 5 ppm/°C (max) from –40°C to +125°C
  • Extremely Low Noise
    • Total Noise: 5 µVRMS With 47-µF Capacitor
    • 1/f Noise (0.1 Hz to 10 Hz): 3 µVPP/V
  • Integrated ADC Drive Buffer
    • Low Output Impedance: < 50 mΩ (0-200 kHz)
    • First Sample Precise to 18 Bits With ADS8881
    • Enables Burst-Mode DAQ Systems
  • Low Supply Current: 820 µA
  • Low Shutdown Current: 1 µA
  • High Initial Accuracy: ±0.05%
  • Very-Low Noise and Distortion
    • SNR: 100.5 dB, THD: –125 dB (ADS8881)
    • SNR: 106 dB, THD: –120 dB (ADS127L01)
  • Output Current Drive: ±4 mA
  • Programmable Short-Circuit Current
  • Verified to Drive REF Pin of ADS88xx family of SAR ADCs and ADS127xx family of Wideband ΔΣ ADCs
  • Excellent Temperature Drift Performance
    • 5 ppm/°C (max) from –40°C to +125°C
  • Extremely Low Noise
    • Total Noise: 5 µVRMS With 47-µF Capacitor
    • 1/f Noise (0.1 Hz to 10 Hz): 3 µVPP/V
  • Integrated ADC Drive Buffer
    • Low Output Impedance: < 50 mΩ (0-200 kHz)
    • First Sample Precise to 18 Bits With ADS8881
    • Enables Burst-Mode DAQ Systems
  • Low Supply Current: 820 µA
  • Low Shutdown Current: 1 µA
  • High Initial Accuracy: ±0.05%
  • Very-Low Noise and Distortion
    • SNR: 100.5 dB, THD: –125 dB (ADS8881)
    • SNR: 106 dB, THD: –120 dB (ADS127L01)
  • Output Current Drive: ±4 mA
  • Programmable Short-Circuit Current
  • Verified to Drive REF Pin of ADS88xx family of SAR ADCs and ADS127xx family of Wideband ΔΣ ADCs

The REF6000 family of voltage references have an integrated low output impedance buffer that enable the user to directly drive the REF pin of precision data converters, while preserving linearity, distortion, and noise performance. Most precision SAR and Delta-Sigma ADCs, switch binary-weighted capacitors onto the REF pin during the conversion process. In order to support this dynamic load the output of the voltage reference must be buffered with a low-output impedance (high-bandwidth) buffer. The REF6000 family devices are well suited, but not limited, to drive the REF pin of the ADS88xx family of SAR ADCs, and ADS127xx family of delta-sigma ADCs, as well as other digital-to-analog converters (DACs).

The REF6000 family of voltage references are able to maintain an output voltage within 1LSB (18-bit) with minimal droop, even during the first conversion while driving the REF pin of the ADS8881. This feature is useful in burst-mode, event-triggered, equivalent-time sampling, and variable-sampling-rate data-acquisition systems. The REF60xx variants of REF6000 family specify a maximum temperature drift of just 5 ppm/°C and initial accuracy of 0.05% for both the voltage reference and the low output impedance buffer combined. For various temperature drift options in REF6000 family, see the Device Comparison Table.

The REF6000 family of voltage references have an integrated low output impedance buffer that enable the user to directly drive the REF pin of precision data converters, while preserving linearity, distortion, and noise performance. Most precision SAR and Delta-Sigma ADCs, switch binary-weighted capacitors onto the REF pin during the conversion process. In order to support this dynamic load the output of the voltage reference must be buffered with a low-output impedance (high-bandwidth) buffer. The REF6000 family devices are well suited, but not limited, to drive the REF pin of the ADS88xx family of SAR ADCs, and ADS127xx family of delta-sigma ADCs, as well as other digital-to-analog converters (DACs).

The REF6000 family of voltage references are able to maintain an output voltage within 1LSB (18-bit) with minimal droop, even during the first conversion while driving the REF pin of the ADS8881. This feature is useful in burst-mode, event-triggered, equivalent-time sampling, and variable-sampling-rate data-acquisition systems. The REF60xx variants of REF6000 family specify a maximum temperature drift of just 5 ppm/°C and initial accuracy of 0.05% for both the voltage reference and the low output impedance buffer combined. For various temperature drift options in REF6000 family, see the Device Comparison Table.
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類型 標題 日期
* Data sheet REF60xx High-Precision Voltage Reference With Integrated ADC Drive Buffer datasheet (Rev. B) PDF | HTML 2016年 8月 29日
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics 2019年 6月 28日
User guide ADS8881EVMV2-PDK User's Guide (Rev. A) 2017年 10月 4日
User guide ADS8881EVMV2-PDK User's Guide 2017年 5月 8日
White paper Voltage-reference impact on total harmonic distortion 2016年 8月 1日

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開發板

ADS8881EVMV2-PDK — ADS8881 18 位元 1 MSPS 序列介面 SAR ADC 評估模組 V2 PDK

The ADS8881EVMV2-PDK is an evaluation platform for the ADS8881 successive approximation register (SAR) analog-to-digital converter (ADC). The evaluation kit includes the ADS8881 EVMV2 board, the PHI controller board, and accompanying computer software that enables the user to communicate with (...)
使用指南: PDF
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開發板

REF6025EVM-PDK — REF6025 電壓參考評估模組

The REF6025EVM-PDK is a platform for evaluating the performance of the REF6025 voltage reference. The evaluation kit brings out the burst mode performance of the device which is a key feature of the device.
使用指南: PDF
TI.com 無法提供
模擬型號

REF6045 TINA-TI Reference Design (Rev. A)

SBOM993A.ZIP (22 KB) - TINA-TI Reference Design
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模擬型號

REF6045 TINA-TI Transient Spice Model

SBOM992.ZIP (31 KB) - TINA-TI Spice Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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參考設計

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This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest power solution for a full scale input sine wave of 10 KHz. At a total power consumption of less than 35mW, this (...)
使用指南: PDF
電路圖: PDF
參考設計

TIPD112 — 適用於多工器和步進輸入的資料採集、18 位元、1uS 全幅反應參考設計

This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide 18-bit settling performance for a Full Scale Step Input signal, thus leading to excellent system linearity. Such an input (...)
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