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第 3 代雙通道 USB 3.0 轉接驅動器

SN65LVPE502 不建議用於新設計
儘管為了支援以前的設計而繼續生產此項產品,但我們並不建議用在新設計上。考量下列其中一項替代產品:
open-in-new 比較替代產品
引腳對引腳的功能與所比較的產品相同
TUSB522P 現行 第四代雙通道 USB 3.0 轉接驅動器 This product complies to newer USB specifications

產品詳細資料

Type Redriver Function USB 3.0 Number of channels 2 Rating Catalog Operating temperature range (°C) 0 to 85
Type Redriver Function USB 3.0 Number of channels 2 Rating Catalog Operating temperature range (°C) 0 to 85
VQFN (RGE) 24 16 mm² 4 x 4
  • Single Lane USB 3.0 Equalizer/Redriver
  • Selectable Equalization, De-emphasis and Output Swing Control
  • Integrated Termination
  • Hot-Plug Capable
  • Receiver Detect
  • Low Power:
    • 315mW(TYP), VCC = 3.3V
  • Auto Low Power Modes:
    • 5mW (TYP) When no Connection Detected
    • 70mW (TYP) When in U2/U3 Mode
  • Excellent Jitter and Loss Compensation Capability: to 24"
    • 24" of 6 mil Stripline on FR4
    • 12" on Input and 4m, 26AWG USB 3.0 Cable on Output
  • Small foot print – 24 Pin (4mm × 4mm) QFN Package
  • High Protection Against ESD Transient
    • HBM: 5,000 V
    • CDM: 1,500 V
    • MM: 200 V
  • Single Lane USB 3.0 Equalizer/Redriver
  • Selectable Equalization, De-emphasis and Output Swing Control
  • Integrated Termination
  • Hot-Plug Capable
  • Receiver Detect
  • Low Power:
    • 315mW(TYP), VCC = 3.3V
  • Auto Low Power Modes:
    • 5mW (TYP) When no Connection Detected
    • 70mW (TYP) When in U2/U3 Mode
  • Excellent Jitter and Loss Compensation Capability: to 24"
    • 24" of 6 mil Stripline on FR4
    • 12" on Input and 4m, 26AWG USB 3.0 Cable on Output
  • Small foot print – 24 Pin (4mm × 4mm) QFN Package
  • High Protection Against ESD Transient
    • HBM: 5,000 V
    • CDM: 1,500 V
    • MM: 200 V

The SN65LVPE502 is a dual channel, single lane USB 3.0 redriver and signal conditioner supporting data rates of 5.0Gbps. The device complies with USB 3.0 spec revision 1.0, supporting electrical idle condition and low frequency periodic signals (LFPS) for USB 3.0 power management modes.

Programmable EQ, De-Emphasis and Amplitude Swing

The SN65LVPE502 is designed to minimize signal degradation effects such as crosstalk and inter-symbol interference (ISI) that limits the interconnect distance between two devices. The input stage of each channel offers selectable equalization settings that can be programmed to match loss in the channel. The differential outputs provide selectable de-emphasis to compensate for the anticipated distortion USB 3.0 signal will experience. Level of de-emphasis will depend on the length of interconnect and its characteristics. The SN65LVPE502 provides a unique way to tailor output de-emphasis on a per channel basis with use of DE and OS pins. All Rx and Tx equalization settings supported by the device are programmed by six 3-state pins as shown in .

Low Power Modes

The device supports three low power modes as described below.

  1. Sleep Mode

    Initiated anytime EN_RXD undergoes a high to low transition or when device powers up with EN_RXD set low. In sleep mode both input and output terminations are held at HiZ and device ceases operation to conserve power. Sleep mode max power consumption is 1mW, entry time is 2µs, device exits sleep mode to Rx.Detect mode after EN_RXD is driven to VCC, exit time is 100µs max.

  2. RX Detect Mode – When no remote device is connected

    Anytime SN65LVPE502 detects a break in link (i.e., when upstream device is disconnected) or after powerup fails to find a remote device, SN65LVPE502 goes to Rx Detect mode and conserves power by shutting down majority of the internal circuitry. In this mode, input termination for both channels are driven to Hi-Z. In Rx Detect mode device power is <10mW(TYP) or less than 5% of its normal operating power This feature is useful in saving system power in mobile applications like notebook PC where battery life is critical.

    Anytime an upstream device gets reconnected the redriver automatically senses the connection and goes to normal operating mode. This operation requires no setting to the device.

  3. U2/U3 Mode

    With the help of internal timers the device tracks when link enters USB 3.0 low power modes U2 and U3, in these modes link is in electrical idle state. SN65LVPE502 will selectively turn-off internal circuitry to save on power. Typical power saving is about 75% lower than normal operating mode. The device will automatically revert to active mode when signaling activity (LFPS) is detected.

Receiver Detection

RX.Detect cycle is performed by first setting Rx termination for each channel to Hi-Z, device then starts sensing for receiver termination that may be attached at the other end of each TX.

If receiver is detected on both channel:

  • The TX and RX terminations are switched to ZDIFF-TX, ZDIFF-RX, respectively

If no receiver is detected on one or both channels:

  • The transmitter is pulled to Hi-Z
  • The channel is put in low power mode
  • Device attempts to detect Rx termination in 12 ms (TYP) interval until termination is found or the device is put in sleep mode.

USB Compliance Mode

The device enters USB compliance mode when both EN_RXD and CM pins are set H. This mode is used to test the transmitter for compliance to voltage and timing specifications per USB 3.0 compliance specs. In this mode each channel will maintain its low-impedance termination RDC-RX, while auto Rx detect operation in the device is disabled.

Electrical Idle Support

The electrical idle support is needed for low frequency periodic signaling (LFPS) used in USB 3.0 side band communication. A link is in an electrical idle state when the TX± voltage is held at a steady constant value like the common mode voltage. SN65LVPE502 detects an electrical idle state when RX± voltage at the device pin falls below VRX_IDLE_DIFFpp min. After detection of an idle state in a given channel the device asserts electrical idle state in its corresponding TX. When RX± voltage exceeds VRX_IDLE_DIFFpp max normal operation is restored and output start passing input signal. The electrical idle exit and entry time is specified at ≤6 ns.

The SN65LVPE502 is a dual channel, single lane USB 3.0 redriver and signal conditioner supporting data rates of 5.0Gbps. The device complies with USB 3.0 spec revision 1.0, supporting electrical idle condition and low frequency periodic signals (LFPS) for USB 3.0 power management modes.

Programmable EQ, De-Emphasis and Amplitude Swing

The SN65LVPE502 is designed to minimize signal degradation effects such as crosstalk and inter-symbol interference (ISI) that limits the interconnect distance between two devices. The input stage of each channel offers selectable equalization settings that can be programmed to match loss in the channel. The differential outputs provide selectable de-emphasis to compensate for the anticipated distortion USB 3.0 signal will experience. Level of de-emphasis will depend on the length of interconnect and its characteristics. The SN65LVPE502 provides a unique way to tailor output de-emphasis on a per channel basis with use of DE and OS pins. All Rx and Tx equalization settings supported by the device are programmed by six 3-state pins as shown in .

Low Power Modes

The device supports three low power modes as described below.

  1. Sleep Mode

    Initiated anytime EN_RXD undergoes a high to low transition or when device powers up with EN_RXD set low. In sleep mode both input and output terminations are held at HiZ and device ceases operation to conserve power. Sleep mode max power consumption is 1mW, entry time is 2µs, device exits sleep mode to Rx.Detect mode after EN_RXD is driven to VCC, exit time is 100µs max.

  2. RX Detect Mode – When no remote device is connected

    Anytime SN65LVPE502 detects a break in link (i.e., when upstream device is disconnected) or after powerup fails to find a remote device, SN65LVPE502 goes to Rx Detect mode and conserves power by shutting down majority of the internal circuitry. In this mode, input termination for both channels are driven to Hi-Z. In Rx Detect mode device power is <10mW(TYP) or less than 5% of its normal operating power This feature is useful in saving system power in mobile applications like notebook PC where battery life is critical.

    Anytime an upstream device gets reconnected the redriver automatically senses the connection and goes to normal operating mode. This operation requires no setting to the device.

  3. U2/U3 Mode

    With the help of internal timers the device tracks when link enters USB 3.0 low power modes U2 and U3, in these modes link is in electrical idle state. SN65LVPE502 will selectively turn-off internal circuitry to save on power. Typical power saving is about 75% lower than normal operating mode. The device will automatically revert to active mode when signaling activity (LFPS) is detected.

Receiver Detection

RX.Detect cycle is performed by first setting Rx termination for each channel to Hi-Z, device then starts sensing for receiver termination that may be attached at the other end of each TX.

If receiver is detected on both channel:

  • The TX and RX terminations are switched to ZDIFF-TX, ZDIFF-RX, respectively

If no receiver is detected on one or both channels:

  • The transmitter is pulled to Hi-Z
  • The channel is put in low power mode
  • Device attempts to detect Rx termination in 12 ms (TYP) interval until termination is found or the device is put in sleep mode.

USB Compliance Mode

The device enters USB compliance mode when both EN_RXD and CM pins are set H. This mode is used to test the transmitter for compliance to voltage and timing specifications per USB 3.0 compliance specs. In this mode each channel will maintain its low-impedance termination RDC-RX, while auto Rx detect operation in the device is disabled.

Electrical Idle Support

The electrical idle support is needed for low frequency periodic signaling (LFPS) used in USB 3.0 side band communication. A link is in an electrical idle state when the TX± voltage is held at a steady constant value like the common mode voltage. SN65LVPE502 detects an electrical idle state when RX± voltage at the device pin falls below VRX_IDLE_DIFFpp min. After detection of an idle state in a given channel the device asserts electrical idle state in its corresponding TX. When RX± voltage exceeds VRX_IDLE_DIFFpp max normal operation is restored and output start passing input signal. The electrical idle exit and entry time is specified at ≤6 ns.

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技術文件

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類型 標題 日期
* Data sheet Single Lane USB 3.0 Redriver . datasheet (Rev. A) 2012年 2月 10日
* Errata SN65LVPE502 Electrical Compliance Test Report 2010年 9月 23日

設計與開發

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模擬型號

SN65LVPE502 HSPICE Model (Rev. A)

SLLM207A.ZIP (627 KB) - HSpice Model
模擬工具

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGE) 24 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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