產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6600 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 1.9 Iq per channel (typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6600 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 1.9 Iq per channel (typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet THS4509 Wideband, Low-Noise, Low-Distortion, Fully-Differential Amplifier datasheet (Rev. I) PDF | HTML 2016年 7月 29日
Application brief Why Use an FDA to Drive an ADC? PDF | HTML 2026年 1月 8日
Application brief Active Filter Design for Differential ADCs (Rev. A) PDF | HTML 2025年 10月 8日
Circuit design Single-ended input to differential output circuit using a fully-differential amp (Rev. A) PDF | HTML 2024年 9月 25日
Product overview Pairing ADC Drivers With Fully-Differential Input ADCs for Wide Bandwidth Data Acquisition 2024年 4月 1日
E-book Engineer's Guide to High-Speed Amplifiers 2023年 10月 18日
Analog Design Journal Q3 2009 Issue Analog Applications Journal 2018年 9月 24日
Analog Design Journal Q4 2009 Issue Analog Applications Journal 2018年 9月 24日
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 2018年 6月 14日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Design for a Wideband Differential Transimpedance DAC Output (Rev. A) 2016年 10月 17日
Application note Fully-Differential Amplifiers (Rev. E) 2016年 9月 19日
Analog Design Journal Using single-supply fully diff. amps with neg. input voltages to drive ADCs 2010年 11月 15日
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
Analog Design Journal Using fully differential op amps as attenuators, Part 3 2009年 10月 4日
Analog Design Journal Using fully differential op amps as attenuators, Part 2 2009年 7月 14日
Analog Design Journal Output impedance matching with fully differential operational amplifiers 2009年 3月 11日
Analog Design Journal Q1 2009 Issue Analog Applications Journal 2009年 3月 11日
Analog Design Journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 2005年 10月 10日
Analog Design Journal Analysis of fully differential amplifiers 2005年 3月 11日
Analog Design Journal Fully differential amplifiers applications:Line termination,driving high-speed.. 2005年 3月 2日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

THS4508EVM — THS4508 評估模組

THS4508EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4508EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10 dB and 50 ohm input and (...)

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開發板

THS4509EVM — THS4509 評估模組

THS4509RGT Eval 1 EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4509RGT Eval 1 EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10dB (...)

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開發板

THS4511EVM — THS4511 評估模組

THS4511EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4511EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 ohm input and (...)

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開發板

THS4513EVM — THS4513 評估模組

THS4513EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4513EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0dB and 50 ohm input and (...)

TI.com 無法提供
開發板

THS4520EVM — THS4520 評估模組

THS4520EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4520EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 Ω (...)

TI.com 無法提供
模擬型號

THS4509 PSpice Model (Rev. D)

SLOC050D.ZIP (55 KB) - PSpice Model
模擬型號

THS4509 TINA-TI Reference Design (Rev. B)

SLOM152B.TSC (53 KB) - TINA-TI Reference Design
模擬型號

THS4509 TINA-TI Spice Model (Rev. A)

SLOM151A.ZIP (5 KB) - TINA-TI Spice Model
計算工具

SBOR022 TI FDA Calculator

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDA-00093 — 最佳化 THS4509 以驅動高速 ADC 參考設計

This reference design shows the ability of the high-speed amplifier, THS4509 to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00092 — 將 LMH6554 最佳化以驅動高速 ADC

This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGT) 16 Ultra Librarian

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  • 認證摘要
  • 進行中的可靠性監測
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