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THS4541 現行 高速差分 I/O 放大器 Faster slew rate (1500 V/μs), lower voltage offset (0.45mV) and lower power (10.1 mA)

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 620 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 570 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2 Iq per channel (typ) (mA) 14.2 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 2.5 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 105 2nd harmonic (dBc) 115 3rd harmonic (dBc) 123 Frequency of harmonic distortion measurement (MHz) 0.1 GBW (typ) (MHz) 1200 Input bias current (max) (pA) 10000000 Features Shutdown CMRR (typ) (dB) 84 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 620 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 570 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2 Iq per channel (typ) (mA) 14.2 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 2.5 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 105 2nd harmonic (dBc) 115 3rd harmonic (dBc) 123 Frequency of harmonic distortion measurement (MHz) 0.1 GBW (typ) (MHz) 1200 Input bias current (max) (pA) 10000000 Features Shutdown CMRR (typ) (dB) 84 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Fully Differential Architecture With Rail-to-Rail Outputs
  • Centered Input Common-mode Range
  • Minimum Gain of 1 V/V (0 dB)
  • Bandwidth: 620 MHz
  • Slew Rate: 570 V/µs
  • 0.1% Settling Time: 7 ns
  • HD2: –115 dBc at 100 kHz, VOD = 8 VPP
  • HD3: –123 dBc at 100 kHz, VOD = 8 VPP
  • Input Voltage Noise: 2 nV/Hz (f >10 kHz)
  • Output Common-Mode Control
  • Power Supply:
    • Voltage: 3.3 V (±1.65 V) to 5 V (±2.5 V)
    • Current: 14.2 mA
  • Power-Down Capability: 15 µA
  • APPLICATIONS
    • 5-V and 3.3-V Data Acquisition Systems
    • High Linearity ADC Amplifier
    • Wireless Communication
    • Test and Measurement
    • Voice Processing Systems

  • Fully Differential Architecture With Rail-to-Rail Outputs
  • Centered Input Common-mode Range
  • Minimum Gain of 1 V/V (0 dB)
  • Bandwidth: 620 MHz
  • Slew Rate: 570 V/µs
  • 0.1% Settling Time: 7 ns
  • HD2: –115 dBc at 100 kHz, VOD = 8 VPP
  • HD3: –123 dBc at 100 kHz, VOD = 8 VPP
  • Input Voltage Noise: 2 nV/Hz (f >10 kHz)
  • Output Common-Mode Control
  • Power Supply:
    • Voltage: 3.3 V (±1.65 V) to 5 V (±2.5 V)
    • Current: 14.2 mA
  • Power-Down Capability: 15 µA
  • APPLICATIONS
    • 5-V and 3.3-V Data Acquisition Systems
    • High Linearity ADC Amplifier
    • Wireless Communication
    • Test and Measurement
    • Voice Processing Systems

The THS4520 is a wideband, fully differential operational amplifier designed for 5-V data acquisition systems. It has very low noise at 2 nV/ load. The slew rate is 570 V/µs, and with a settling time of 7 ns to 0.1% (2-V step), it is ideal for data acquisition applications. It is designed for unity gain stability.

To allow for dc coupling to ADCs, its unique output common-mode control circuit maintains the output common-mode voltage within 0.25 mV offset (typical) from the set voltage. The common-mode set point defaults to mid-supply by internal circuitry, which may be over-driven from an external source.

The input and output are optimized for best performance with their common-mode voltages set to mid-supply. Along with high performance at low power supply voltage, this makes for extremely high performance single supply 5-V and 3.3-V data acquisition systems.

The THS4520 is offered in a Quad 16-pin leadless QFN package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to 85°C.

The THS4520 is a wideband, fully differential operational amplifier designed for 5-V data acquisition systems. It has very low noise at 2 nV/ load. The slew rate is 570 V/µs, and with a settling time of 7 ns to 0.1% (2-V step), it is ideal for data acquisition applications. It is designed for unity gain stability.

To allow for dc coupling to ADCs, its unique output common-mode control circuit maintains the output common-mode voltage within 0.25 mV offset (typical) from the set voltage. The common-mode set point defaults to mid-supply by internal circuitry, which may be over-driven from an external source.

The input and output are optimized for best performance with their common-mode voltages set to mid-supply. Along with high performance at low power supply voltage, this makes for extremely high performance single supply 5-V and 3.3-V data acquisition systems.

The THS4520 is offered in a Quad 16-pin leadless QFN package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to 85°C.

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類型 標題 日期
* Data sheet THS4520 Wideband, Low Noise, Low Distortion, Fully Differential Amplifier datasheet (Rev. B) 2007年 3月 15日
Analog Design Journal Q3 2009 Issue Analog Applications Journal 2018年 9月 24日
Analog Design Journal Q4 2009 Issue Analog Applications Journal 2018年 9月 24日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Analog Design Journal Using fully differential op amps as attenuators, Part 3 2009年 10月 4日
Analog Design Journal Using fully differential op amps as attenuators, Part 2 2009年 7月 14日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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開發板

THS4520EVM — THS4520 評估模組

THS4520EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4520EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 Ω (...)

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模擬型號

THS4520 PSpice Model (Rev. C)

SBOC225C.ZIP (33 KB) - PSpice Model
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THS4520 TINA-TI Reference Design (Rev. B)

SLOM157B.TSC (55 KB) - TINA-TI Reference Design
模擬型號

THS4520 TINA-TI Spice Model (Rev. B)

SLOM156B.ZIP (5 KB) - TINA-TI Spice Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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