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THS4551 現行 低雜訊、精密、150MHz、全差分放大器 Wider bandwidth (BW) (135 MHz), lower noise (3.3 nV/√Hz) and higher precision (0.175 mV)

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.

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類型 標題 日期
* Data sheet THS452x Very Low Power, Negative Rail Input, Rail-To-Rail Output, Fully Differential Amplifier datasheet (Rev. H) PDF | HTML 2015年 6月 18日
Circuit design High-speed overcurrent detection circuit (Rev. B) PDF | HTML 2024年 10月 2日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Fully-Differential Amplifiers (Rev. E) 2016年 9月 19日
More literature Featured High Speed Differential Amplifiers 2012年 10月 23日
Analog Design Journal Converting single-ended video to differential video in single-supply systems 2011年 9月 16日
Analog Design Journal Using single-supply fully diff. amps with neg. input voltages to drive ADCs 2010年 11月 15日
Application note DC Output Errors in a Fully-Differential Amplifier 2010年 5月 25日
Analog Design Journal Using fully differential op amps as attenuators, Part 3 2009年 10月 4日
EVM User's guide THS4521/45222/4524EVM User's Guide 2009年 7月 16日
Analog Design Journal Using fully differential op amps as attenuators, Part 2 2009年 7月 14日
Analog Design Journal Using fully differential op amps as attenuators, Part 1 2009年 5月 1日
Analog Design Journal Analysis of fully differential amplifiers 2005年 3月 11日
Analog Design Journal Designing for low distortion with high-speed op amps 2005年 3月 2日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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開發板

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The THS4521EVM is an evaluation module for the single, THS4521 in the D (8-lead SOIC) package.

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使用指南: PDF
TI.com 無法提供
模擬型號

THS4521 PSpice Model (Rev. E)

SBOM343E.ZIP (36 KB) - PSpice Model
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SBOM341E.TSC (1619 KB) - TINA-TI Reference Design
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SBOM342D.ZIP (16 KB) - TINA-TI Spice Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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