TPS720
- 350-mA High-Performance LDO
- Low Quiescent Current: 38 µA
- Excellent Load Transient Response:
±15 mV for ILOAD = 0 mA to 350 mA in 1 µs - Excellent Line Transient Response:
ΔVOUT = ±2 mV for ΔVBIAS = ±600 mV in 1 µs
ΔVOUT = ±200 µV for ΔVIN = ±400 mV in 1 µs - Low Noise: 48 µVRMS (10 Hz to 100 kHz)
- 80 dB VIN PSRR (10 Hz to 10 kHz)
- 70 dB VBIAS PSRR (10 Hz to 10 kHz)
- Fast Start-Up Time: 140 µs
- Built-In Soft-Start With Monotonic VOUT Rise and Start-Up Current Limited to 100 mA + ILOAD
- Overcurrent and Thermal Protection
- Low Dropout: 110 mV at ILOAD = 350 mA
- Stable with 2.2-µF Output Capacitor
- Available in 1.33 mm × 0.96 mm DSBGA-5 and 2 mm × 2 mm SON-6 Packages
The TPS720 family of dual rail, low-dropout linear regulators (LDOs) offers outstanding ac performance (PSRR, load and line transient response), while consuming a very low quiescent current of 38 µA.
The VBIAS rail that powers the control circuit of the LDO draws very low current (on the order of the quiescent current of the LDO) and can be connected to any power supply that is equal to or greater than 1.4 V above the output voltage. The main power path is through VIN, which can be a lower voltage than VBIAS; it can be as low as VOUT + VDO, increasing the efficiency of the solution in many power-sensitive applications. For example, VIN can be an output of a high-efficiency, DC-DC step-down regulator.
The TPS720 supports a novel feature in which the output of the LDO regulates under light loads when the IN pin is left floating. The light-load drive current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the voltage to a light load.
The TPS720 is stable with ceramic capacitors and uses an advanced BICMOS fabrication process that yields a dropout of 110 mV at a 350-mA output load. The TPS720 has the unique feature of providing a monotonic VOUT rise (overshoot limited to 3%) with VIN inrush current limited to 100 mA + ILOAD with an output capacitor of 2.2 µF.
The TPS720 uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over load, line, process, and temperature extremes. An ultra-small DSBGA package makes the TPS720 ideal for handheld applications. The TPS720 is also available in a SON-8 package. This family of devices is fully specified over the temperature range of
TJ = –40°C to 125°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS720 350 mA, Ultra-Low VIN, RF Low-Dropout Linear Regulator With Bias Pin datasheet (Rev. E) | PDF | HTML | 2015年 9月 30日 |
| Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 2020年 8月 18日 | |
| Application note | A Topical Index of TI LDO Application Notes (Rev. F) | 2019年 6月 27日 | ||
| Selection guide | Low Dropout Regulators Quick Reference Guide (Rev. P) | 2018年 3月 21日 | ||
| Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 2017年 8月 9日 | |
| EVM User's guide | TPS720xxDRVEVM Evaluation Module | 2010年 4月 29日 | ||
| Application note | Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs | 2010年 3月 26日 | ||
| Analog Design Journal | Q2 2009 Issue Analog Applications Journal | 2009年 5月 1日 | ||
| Analog Design Journal | Taming linear-regulator inrush currents | 2009年 5月 1日 | ||
| User guide | TPS720xx | 2008年 8月 19日 | ||
| Application note | Inrush Current Limit in the TPS720xx | 2008年 6月 6日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TPS720105DRVEVM — 採用 DRV 封裝的 TPS720105 LDO 線性穩壓器評估模組
TIDA-00204 — 符合 EMI/EMC 規範的工業溫度雙連接埠 Gigabit 乙太網路 PHY 參考設計
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| DSBGA (YZU) | 5 | Ultra Librarian |
| WSON (DRV) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。