首頁 介面 USB IC USB 集線器與控制器

具 PIPE3 和 ULPI 介面的超高速 USB 收發器

產品詳細資料

Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
NFBGA (ZAY) 175 144 mm² 12 x 12
  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Conneciton
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant with USB 3.0 Specification
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low Power Mode
      • Compliant with UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on a Single Reference Clock Selectable from 20, 25, 30 or 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- x 12-nF BGA Package (175ZAY)

Target Applications

  • Surveillance Cameras
  • Multimedia Handset
  • Smartphone
  • Digital Still Camera
  • Portable Media Player
  • Personal Navigation Device
  • Audio Dock
  • Video IP Phone
  • Wireless IP Phone
  • Software Defined Radio

  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Conneciton
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant with USB 3.0 Specification
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low Power Mode
      • Compliant with UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on a Single Reference Clock Selectable from 20, 25, 30 or 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- x 12-nF BGA Package (175ZAY)

Target Applications

  • Surveillance Cameras
  • Multimedia Handset
  • Smartphone
  • Digital Still Camera
  • Portable Media Player
  • Personal Navigation Device
  • Audio Dock
  • Video IP Phone
  • Wireless IP Phone
  • Software Defined Radio

The TUSB1310 is a single port, 5.0-Gbps USB 3.0 physical layer transceiver operating off of a single crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310 provides a clock to USB link layer controllers. The single reference clock allows the TUSB1310 to provide a cost effective USB 3.0 solution with few external components and a minimum implementation cost.

Link controller interfaces to the TUSB1310 are via a PIPE (SuperSpeed) and a ULPI (USB2.0) interface. The 16-bit PIPE operates with a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active power and idle power by improving power management. The PIPE interface controls the TUSB1310 low power states which minimizes power consumption.

SuperSpeed USB leverages existing USB software infrastructure by keeping the existing software interfaces and software drivers. In addition the SuperSpeed USB retains backward compatibility at the Type-A connector with USB2.0 based PCs and with USB2.0 cables.

The TUSB1310 is a single port, 5.0-Gbps USB 3.0 physical layer transceiver operating off of a single crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310 provides a clock to USB link layer controllers. The single reference clock allows the TUSB1310 to provide a cost effective USB 3.0 solution with few external components and a minimum implementation cost.

Link controller interfaces to the TUSB1310 are via a PIPE (SuperSpeed) and a ULPI (USB2.0) interface. The 16-bit PIPE operates with a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active power and idle power by improving power management. The PIPE interface controls the TUSB1310 low power states which minimizes power consumption.

SuperSpeed USB leverages existing USB software infrastructure by keeping the existing software interfaces and software drivers. In addition the SuperSpeed USB retains backward compatibility at the Type-A connector with USB2.0 based PCs and with USB2.0 cables.

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類型 標題 日期
* Data sheet USB 3.0 Transceiver.. datasheet (Rev. E) 2011年 5月 31日
* Errata TUSB1310 Errata (Rev. A) 2010年 11月 22日
Application note TUSB1310 Implementation Guide 2010年 6月 18日

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TUSB1310 IBIS Model (Rev. A)

SLLM131A.ZIP (1538 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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NFBGA (ZAY) 175 Ultra Librarian

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