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隔離式閘極驅動器

UCC21222-Q1

現行

具有停用、可編程失效時間、8V UVLO 的車用 3.0kVrms、4A/6A 2 通道絕緣式閘極驅動器

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最新 UCC21330-Q1 現行 具停用邏輯與可編程失效時間的車用 3kVRMS 4A/6A 雙通道閘極驅動器 Improved CMTI, faster VDD startup

UCC21222-Q1

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC Q100 qualified with:
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40°C to 150°C
  • 4A peak source, 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 8V VDD UVLO
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC Q100 qualified with:
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40°C to 150°C
  • 4A peak source, 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 8V VDD UVLO
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing

The UCC21222-Q1 device is an isolated dual channel gate driver with programmable dead time and a wide temperature range. This device exhibits consistent performance and robustness under extreme temperature conditions. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, IGBT, and GaN transistors.

The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. A 5ns delay matching performance allows two outputs to be paralleled, doubling the drive strength for heavy load conditions without risk of internal shoot-through.

The input side is isolated from the two output drivers by a 3.0kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Resistor programmable dead time gives the capability to adjust dead time for system constraints to improve efficiency and prevent output overlap. Other protection features include a disable feature to shut down both outputs simultaneously when DIS is set high, an integrated deglitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.

The UCC21222-Q1 device is an isolated dual channel gate driver with programmable dead time and a wide temperature range. This device exhibits consistent performance and robustness under extreme temperature conditions. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, IGBT, and GaN transistors.

The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. A 5ns delay matching performance allows two outputs to be paralleled, doubling the drive strength for heavy load conditions without risk of internal shoot-through.

The input side is isolated from the two output drivers by a 3.0kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Resistor programmable dead time gives the capability to adjust dead time for system constraints to improve efficiency and prevent output overlap. Other protection features include a disable feature to shut down both outputs simultaneously when DIS is set high, an integrated deglitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
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類型 標題 日期
* Data sheet UCC21222-Q1 Automotive 4A, 6A, 3kVRMS Isolated Dual-Channel Gate Driver with Dead Time datasheet (Rev. B) PDF | HTML 2024年 4月 2日
White paper 以可靠且經濟實惠的隔離技術解決高電壓設計挑戰 (Rev. C) PDF | HTML 2024年 3月 7日
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 2024年 1月 31日
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 2024年 1月 25日
Certificate UCC21220 CQC Certificate of Product Certification 2023年 8月 16日
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021年 12月 16日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 2019年 7月 22日
User guide Gate Drive Voltage vs. Efficiency 2019年 4月 25日
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 2018年 5月 16日
Application note Isolation Glossary (Rev. A) 2017年 9月 19日
Technical article Are you on-board? Demystifying EV charging systems PDF | HTML 2017年 7月 31日

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開發板

UCC21220EVM-009 — UCC21220 4A、6A 3.0kVRMS 隔離式雙通道閘極驅動器評估模組

UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
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UCC21222-Q1 PSpice Transient Model

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UCC21222-Q1 Unencrypted PSpice Transient Model

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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參考設計

PMP22650 — GaN 式 6.6-kW 雙向車載充電器參考設計

PMP22650 參考設計為 6.6-kW 雙向車載充電器。此設計採用雙相圖騰柱 PFC 與具同步整流的全橋 CLLLC 轉換器。CLLLC 利用頻率和相位調變來調節所需調節範圍內的輸出。此設計在 TMS320F28388D 微控制器中使用單一處理核心，以控制 PFC 和 CLLLC 二者。同步整流可透過與 Rogowski 線圈電流感測器相同的微控制器實作。透過使用高速 GaN 開關 (LMG3522) 可實現高密度。PFC 以 120 kHz 運作，CLLLC 則以 200 kHz 至 800 kHz 的可變頻率運作。開放訊框功率密度 3.8 kW/L 實現 96.5% (...)
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