The LM3880-Q1 simple power supply sequencer offers the easiest method to control powerup sequencing and powerdown sequencing of multiple Independent voltage rails. By staggering the startup sequence, it is possible to avoid latch conditions or large in-rush currents that can affect the reliability of the system.
Available in a 6-pin SOT-23 package, the simple sequencer contains a precision enable pin and three open-drain output flags. The open-drain output flags permit that they can be pulled up to distinct voltage supplies separate from the sequencer VDD (only if they do not exceed the recommended maximum voltage of 0.3 V greater than VDD), so as to interface with ICs requiring a range of different enable signals. When the LM3880-Q1 is enabled, the three output flags sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags follow a reverse sequence during power down to avoid latch conditions.
EPROM capability allows every delay and sequence to be fully adjustable. Contact Texas Instruments to request a non-standard configuration.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | LM3880-Q1 Simple Power Sequencer datasheet (Rev. A) | 26 Feb 2021 | |
| Technical article | The need for sequencing in automotive applications | PDF | HTML | 30 Jan 2018 | |
| Technical article | Improving DDR Memory Performance in Automotive Applications | PDF | HTML | 22 Jun 2017 | |
| Analog Design Journal | Power-supply sequencing for FPGAs | 24 Okt 2014 | ||
| EVM User's guide | AN-1491 LM3880 Power Sequencer Demo Board (Rev. A) | 07 Mai 2013 | ||
| Application note | LM1771 and LM3880 Based FPGA Power Supply Reference Design (Rev. A) | 05 Mai 2013 | ||
| Application note | AN-1603 LM274X Reference Designs (Rev. C) | 01 Mai 2013 | ||
| Application note | Power Supply Design Considerations for Modern FPGAs (Power Designer 121) | 02 Feb 2010 |
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The LM3880 evaluation board has been designed to connect directly to the power supplies of an existing system to enable sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once the part is disabled, the shutdown sequence will occur in (...)
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| SOT-23 (DBV) | 6 | Ultra Librarian |
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