SN54HC4002

AKTIV

Military 2-ch, 4-input, 2-V to 6-V 5.2 mA drive strength NOR gate

Produktdetails

Technology family HC Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 4 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Output type Push-Pull Input type Standard CMOS Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 28 Rating Military Operating temperature range (°C) -55 to 125
Technology family HC Number of channels 2 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Inputs per channel 4 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Output type Push-Pull Input type Standard CMOS Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 28 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Dependable Texas Instruments Quality and Reliability
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Dependable Texas Instruments Quality and Reliability

These devices contain two independent 4-input positive NOR gates. They perform the Boolean functions: Y = (A + B + C + D)\ or Y = A\ \x95 B\ \x95 C\ \x95 D\ in positive logic.

The SN54HC4002 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC4002 is characterized for operation from -40°c to 85°C.

These devices contain two independent 4-input positive NOR gates. They perform the Boolean functions: Y = (A + B + C + D)\ or Y = A\ \x95 B\ \x95 C\ \x95 D\ in positive logic.

The SN54HC4002 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC4002 is characterized for operation from -40°c to 85°C.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet Dual 4-Input Positive-NOR Gates datasheet 01 Sep 1987
* SMD SN54HC4002 SMD 84044012A 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Okt 1996
Application note Live Insertion 01 Okt 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 Mai 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
CDIP (J) 14 Ultra Librarian
LCCC (FK) 20 Ultra Librarian

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