Startseite Logik- & Spannungsumsetzung Logikgatter NOR-Gatter
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Logik- & Spannungsumsetzung
Logikgatter
NOR-Gatter

SN74AHC1G02-EP

AKTIV

Verbessertes Produkt, Einzel-NOR-Gatter mit 2 Eingängen, 2 bis 5,5 V

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Datenblatt

SN74AHC1G02-EP

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Technology family AHC Number of channels 1 Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Inputs per channel 2 IOL (max) (mA) 50 IOH (max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family AHC Number of channels 1 Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Inputs per channel 2 IOL (max) (mA) 50 IOH (max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 110 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Low Power Consumption, 10 µA Max ICC
  • ±8 mA Output Drive at 5 V
  • Schmitt Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

This device contains a single 2-input NOR gate that performs the Boolean function Y = A • B or Y = A + B in positive logic.

This device contains a single 2-input NOR gate that performs the Boolean function Y = A • B or Y = A + B in positive logic.
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SN74LVC1G02-EP AKTIV Verbessertes Produkt, Einzel-NOR-Gatter mit 2 Eingängen, 1,65 V bis 5,5 V Voltage range (1.65V to 5.5V), average drive strength (24mA), average propagation delay (5.5ns)

Technische Dokumentation

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Typ Titel Datum
* Data sheet Single 2-Input Positive-NOR Gate datasheet 20 Feb 2008
* VID SN74AHC1G02-EP VID V6208611 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dez 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dez 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Okt 1996

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOT-SC70 (DCK) 5 Ultra Librarian
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Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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