Berechnungstool
TPS544C25
4,5 V bis 18 V, 30 A, Synchron-SWIFT™-Abwärtswandler mit PMBus und Frequenzsynchronisation
Datenblatt
TPS544C25
- PMBus 1.2 Compliant Converters: 20 A and 30 A
- Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.5 V to 5.5 V
- 5 mm × 7 mm LQFN Package
- Single Thermal Pad
- Integrated 5.5-mΩ and 2.0-mΩ Stacked NexFET™ Power Stage
- 500-mV to 1500-mV Reference for Adapative Voltage Scaling (AVS) and Margining through PMBus
- 0.5% Reference Accuracy at 600 mV and Above
- Lossless Low-Side MOSFET Current Sensing
- Voltage Mode Control with Input Feed-Forward
- Differential Remote Sensing
- Monotonic Start-Up into Pre-Biased Output
- Output Voltage and Output Current Reporting
- External Temperature Monitoring with 2N3904 Transistor
- Programmable via the PMBus interface
- VOUT_COMMAND and AVS VOUT Transition Rate
- Overcurrent Protection with Thermal Compensation
- UVLO, Soft-Start and Soft-Stop
- PGOOD, OV, UV, OT Levels
- Fault Responses
- Turn-On and Turn-Off Delays
- Thermal Shutdown
- Pin Strapping for Switching Frequency: 200 kHz to 1 MHz
- Frequency Synchronization to an External Clock
- Footprint Compatible 20-A, 30-A Converters
The TPS544x25 devices are PMBus 1.2 Compliant, non-isolated DC-DC converters with integrated FETs, capable of high-frequency operation and 20-A or 30-A current output from a 5 mm × 7 mm package. High-frequency, low-loss switching, provided by an integrated NexFET™ power stage and optimized drivers, allows for very high-density power solutions. The PMBus interface enables the AVS through VOUT_COMMAND, flexible converter configuration, as well as key parameters monitoring including output voltage, current and an optional external temperature. Response to fault conditions can be set to either restart, latch-off or ignore depending on system requirements.
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Technische Dokumentation
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Alle anzeigen 9 | Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | TPS544x25 4.5-V to 18-V, 20-A and 30-A SWIFT Synchronous Buck Converters with PMBus and Frequency Synchronization datasheet | PDF | HTML | 15 Mai 2015 |
| EVM User's guide | TPS5442x5 Step-Down Converter Evaluation Module User's Guide (Rev. B) | PDF | HTML | 26 Aug 2021 | |
| Application note | Programming the NVM of PMBus Buck Converters to Support Mass-Production Needs (Rev. B) | 13 Mai 2019 | ||
| Analog Design Journal | Maximizing power density and thermal performance in power-module designs | 12 Dez 2018 | ||
| Application note | Analysis and Design of Input Filter for DC-DC Circuit | 27 Nov 2017 | ||
| Application note | SMT Guidelines for Stacked Inductor (Inductor On Top) on Voltage Regulator IC | 22 Feb 2016 | ||
| Analog Design Journal | MOSFET power losses and how they affect power-supply efficiency | 26 Jan 2016 | ||
| Technical article | Select the correct PMBus POL solution for your application | PDF | HTML | 03 Aug 2015 | |
| Application note | Not All Jitter Is Created Equal (Rev. A) | 04 Jul 2015 |
Design und Entwicklung
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
Evaluierungsplatine
TPS544C25EVM-681 — TPS544C25EVM-681-Evaluierungsmodul
The TPS544C25EVM-681 evaluation module (EVM) is designed as a single output DC-DC converter that demonstrates a typical low-voltage application while providing a number of test points to evaluate the performance. It uses a nominal 12-V input bus to produce a regulated 0.95-V output at up to (...)
Treiber oder Bibliothek
PMBUSSW-LINUX — Linux-Treiber für PMBUS
The Linux driver supports PMBus controlled Buck Controllers. The Linux driver supports communication through the PMBus and interfaces with the HWMon framework.
Linux Mainline Status
Available in Linux Main line: Yes
Available through git.ti.com: N/A
Supported Devices:
- tps40400
- tps40422
- tps544b20
- tps544b25
- (...)
Referenzdesigns
PMP11399 — Referenzdesign eines PMBus-Stromversorgungssystems für Enterprise-Ethernet-Switches
PMP11399 is a complete PMBus power system for 3 ASIC/FPGA cores, DDR3 core memory, VTT termination, and auxiliary voltages commonly found on high-performance Ethernet Switches. The hardware is accompanied by a GUI that allows the user to perform real-time configuration and monitoring of the power (...)
Referenzdesigns
PMP12004-HE — Referenzdesign zur Stromversorgung eines Remote Radio Head (RRH) oder Backhaul (BH) mit Xilinx Zynq
This design for powering Xilinx Zynq UltraScale+ (www.xilinx.com/power) Remote Radio Heads (RRH) features the TPS6508640 and is a small and highly efficient solution. The PMIC reduces size, cost, and power loss by having integrated rails into 1 device, high switching frequency and separate rails (...)
Referenzdesigns
PMP20023 — 12 V bis 1 V, 30 A, Spannungmodus-Synchron-Abwärtswandler mit PMBus-Steuerung – Referenzdesign
Fixed frequency voltage mode control is used for communications and computing applications where a predictable frequency and / or synchronization to an external clock is needed. With control and power in one IC and inductor on top of the IC with its raised leads, a very small size solution is (...)
Referenzdesigns
PMP11328 — 30 A, PMBus-Referenzdesign für Xilinx Zynq Ultrascale+ ZU9EG MPSoC Core Rail für Basisstationen
The PMP11328 is a high power density 30A PMBus power supply meeting the Xilinx Ultrascale+ ZU9EG FPGA core rail power specifications for Base Station Remote Radio Unit (RRU) applications. The power supply regulates 0.85V for the core rail at 25A in 55mm x 40mm total power supply PCB area. PMBus (...)
Referenzdesigns
TIDEP0042 — Generierung der AVS SmartReflex-Kernspannung für K2E mit TPS544C25 und PMBus – Referenzdesign
The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage using software and the PMBus interface of the TPS544C25. The circuit can be implemented on the XEVMK2EX.
Referenzdesigns
TIDEP0041 — Generierung der AVS SmartReflex-Kernspannung, PMBus für K2E – Referenzdesign
The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage without the need for any software. The circuit is currently implemented on the XEVMK2EX.
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| LQFN-CLIP (RVF) | 40 | Ultra Librarian |
Bestellen & Qualität
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- Qualifikationszusammenfassung
- Kontinuierliches Zuverlässigkeitsmonitoring
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