Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.
The UCC27223 is a high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).
The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.
This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.
The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD™ package with 2°C/W 
jc.
| Typ | Titel | Datum | ||
|---|---|---|---|---|
| * | Data sheet | High-Efficiency predictive synchronous buck driver - UCC27223 datasheet | 10 Apr 2003 |
Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.
Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support.