Inicio Gestión de la energía Controladores CA/CC y CC/CC (FET externo)
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Gestión de la energía
Controladores CA/CC y CC/CC (FET externo)

TPS51623

ACTIVO

Controlador reductor D-CAP+™ bifásico para VCPU VR12.1

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TPS51623

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Detalles del producto

Vin (min) (V) 4.5 Vin (max) (V) 28 Iout (max) (A) 60 Operating temperature range (°C) -40 to 105 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.5 Vout (max) (V) 1.5 Features Adjustable current limit, Dynamic Voltage Scaling, Enable, Light Load Efficiency, Phase Interleaving, Power good, Pre-Bias Start-Up, Remote Sense, SVID, Synchronous Rectification Iq (typ) (µA) 500 Duty cycle (max) (%) 30 Number of phases 2
Vin (min) (V) 4.5 Vin (max) (V) 28 Iout (max) (A) 60 Operating temperature range (°C) -40 to 105 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.5 Vout (max) (V) 1.5 Features Adjustable current limit, Dynamic Voltage Scaling, Enable, Light Load Efficiency, Phase Interleaving, Power good, Pre-Bias Start-Up, Remote Sense, SVID, Synchronous Rectification Iq (typ) (µA) 500 Duty cycle (max) (%) 30 Number of phases 2
VQFN (RSM) 32 16 mm² 4 x 4
  • VR12.1 serial VID (SVID) compliant
  • 1- or 2-phase operation
  • Supports only zero load line applications
  • 8-Bit DAC output range: 0.25 V to 1.52 V
  • Optimized efficiency at light and heavy loads
  • 8 independent levels of overshoot reduction (OSR) and undershoot reduction (USR)
  • Driverless configuration for efficient high-frequency switching
  • Supports discrete, Power Block, Power Stage or DrMOS MOSFET implementations
  • Accurate, adjustable voltage positioning
  • 300-kHz to 1-MHz frequency selections
  • Patented AutoBalance Phase Balancing
  • Selectable 8-level current limit
  • 4.5-V to 28-V conversion voltage range
  • Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPAD™ integrated circuit package
  • VR12.1 serial VID (SVID) compliant
  • 1- or 2-phase operation
  • Supports only zero load line applications
  • 8-Bit DAC output range: 0.25 V to 1.52 V
  • Optimized efficiency at light and heavy loads
  • 8 independent levels of overshoot reduction (OSR) and undershoot reduction (USR)
  • Driverless configuration for efficient high-frequency switching
  • Supports discrete, Power Block, Power Stage or DrMOS MOSFET implementations
  • Accurate, adjustable voltage positioning
  • 300-kHz to 1-MHz frequency selections
  • Patented AutoBalance Phase Balancing
  • Selectable 8-level current limit
  • 4.5-V to 28-V conversion voltage range
  • Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPAD™ integrated circuit package

The TPS51623 device is a driverless, fully SVID compliant, VR12.1 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51623 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51623 device integrates the full complement of VR12.1 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. When the device is operating in PS4 mode, the quiescent power consumption of the controller is typically 0.25 mW. Adjustable control of VOUT slew rate and voltage positioning round out the VR12.1 features.

Paired with the TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51623 device works with selected TI power stage products for optimum efficiency as well as DrMOS products. The TPS51623 device operates with a default boot voltage of 1 V. Applications can override the default boot voltage by including an external resistor divider in the design.

The TPS51623 device package is a space saving, thermally enhanced 32-pin VQFN package that operates from –40°C to 105°C.

The TPS51623 device is a driverless, fully SVID compliant, VR12.1 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51623 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51623 device integrates the full complement of VR12.1 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. When the device is operating in PS4 mode, the quiescent power consumption of the controller is typically 0.25 mW. Adjustable control of VOUT slew rate and voltage positioning round out the VR12.1 features.

Paired with the TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51623 device works with selected TI power stage products for optimum efficiency as well as DrMOS products. The TPS51623 device operates with a default boot voltage of 1 V. Applications can override the default boot voltage by including an external resistor divider in the design.

The TPS51623 device package is a space saving, thermally enhanced 32-pin VQFN package that operates from –40°C to 105°C.
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Documentación técnica

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* Data sheet TPS51623 Short datasheet 13 abr 2022
Technical article How to create a power supply for Intel’s Braswell processor PDF | HTML 10 ago 2015

Diseño y desarrollo

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Diseños de referencia

TIDA-00572 — Diseño de entrada de alta densidad de potencia de 9 V a 15 V Intel® Pentium™ N3700 VCC0+VCC1 para PC

The TI TPS1623 VR12.1 reference design, supporting Intel® Pentium™ N3700 , uses TI's driverless PWM architecture with TI power stages for high power density, high efficiency, and low component count  while meeting Intel voltage tolerance requirements with low ripple, tight loadline, (...)
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