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TPS7A20U

ACTIVO

Regulador lineal de caída baja (LDO), 75 mA, ruido ultrabajo, IQ baja y PSRR alta

Detalles del producto

Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.075 Vin (max) (V) 6 Vin (min) (V) 1.6 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Fixed output options (V) 1.8, 2.5, 3, 3.1, 3.3, 4.1 Rating Catalog Noise (µVrms) 7 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.0065 Thermal resistance θJA (°C/W) 201.4 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge Accuracy (%) 1.5 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
DSBGA (YCK) 4 0.379456 mm² 0.616 x 0.616
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package
  • Low output voltage noise: 7µVRMS
    • No noise-bypass capacitor required
  • High PSRR: 89dB at 1kHz
  • Very low IQ: 6.5µA
  • Input voltage range: 1.6V to 6.0V
  • Output voltage range: 0.8V to 5.5V
  • Output voltage tolerance: ±1.5% (max)
  • Very low dropout:
    • 95mV (max) at 75mA (VOUT = 1.5V to 5.5V)
  • Low inrush current
  • Smart enable pulldown
  • Stable with 1µF minimum ceramic output capacitor
  • 0.616mm × 0.616mm DSBGA package

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

The TPS7A20U is an ultra-small, low-dropout (LDO) linear regulator that sources 75mA of output current. The TPS7A20U is designed to provide low noise, high PSRR, and excellent load and line transient performance. This performance meets the requirements of RF and other sensitive analog circuits. Using innovative design techniques, the TPS7A20U offers ultra-low noise performance without the addition of a noise bypass capacitor. The TPS7A20U also provides the advantage of low quiescent current, which is designed for battery-powered applications. With a 1.6V to 6.0V input voltage range and a 0.8V to 5.5V output range, the TPS7A20U is applicable for a wide variety of applications. The device uses a precision reference circuit to provide a maximum accuracy of 1.5% over load, line, and temperature variations.

The TPS7A20U features an internal soft-start to lower the inrush current, thus minimizing the input voltage drop during start-up. The device is stable with small ceramic capacitors, allowing for a small overall solution size.

The TPS7A20U has a smart enable input circuit with an internally controlled pulldown resistor that keeps the LDO disabled. The LDO remains disabled even when the EN pin is left floating and helps eliminate the external components used to pulldown the EN pin.

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Documentación técnica

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* Data sheet TPS7A20U 75mA, Low-Noise, Low-IQ, High-PSRR LDO datasheet (Rev. A) PDF | HTML 25 sep 2024

Diseño y desarrollo

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Placa de evaluación

MULTIPKGLDOEVM-823 — Módulo de evaluación del regulador de voltaje lineal LDO universal para paquetes DBV, DRB, DRV y DQN

The MULTIPKGLDOEVM-823 evaluation module (EVM) helps you evaluate the operation and performance of several common packages of linear regulators for possible use in circuit applications. This particular EVM configuration has a DRB, DRV, DQN and DBV footprint for you to solder and (...)

Guía del usuario: PDF
Modelo de simulación

TPS7A20U PSPICE Model

SBVMA05.ZIP (97 KB) - PSpice Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
DSBGA (YCK) 4 Ultra Librarian

Pedidos y calidad

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  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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