TCA9543A
- 1-of-2 Bidirectional Translating Switches
- I2C Bus and SMBus Compatible
- Two active-low interrupt inputs
- Active-low interrupt output
- Active-low reset input
- Two address pins allowing up to four TCA9543A devices on the I2C bus
- Channel selection via I2C bus, in any combination
- Power-up with all switch channels deselected
- Low RON switches
- Allows voltage-level translation between
1.8-V, 2.5-V, 3.3-V, and 5-V buses - No glitch on power-up
- Supports hot insertion
- Low standby current
- Operating power-supply voltage range of 1.65-V to 5.5-V
- 5.5-V Tolerant inputs
- 0 to 400-kHz Clock frequency
- Latch-up Performance exceeds 100-mA Per JESD78
- ESD Protection exceeds JESD 22
- 4000-V Human-body model (A114-A)
- 1500-V Charged-device model (C101)
The TCA9543A is a dual bidirectional translating switch controlled by the I2C bus. The SCL/SDA upstream pair fans out to two downstream pairs, or channels. Either individual SCn/SDn channel or both channels can be selected, determined by the contents of the programmable control register. Two interrupt inputs (INT1–INT0), one for each of the downstream pairs, are provided. One interrupt output (INT) acts as an AND of the two interrupt inputs.
An active-low reset (RESET) input allows the TCA9543A to recover from a situation where one of the downstream I2C buses is stuck in a low state. Pulling RESET low resets the I2C state machine and causes both of the channels to be deselected, as does the internal power-on reset function.
The pass gates of the switches are constructed such that the VCC terminal can be used to limit the maximum high voltage, which will be passed by the TCA9543A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V, or 3.3-V parts can communicate with 5-V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O terminals are 5.5-V tolerant.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TCA9543A Low Voltage 2-Channel I2C Bus Switch With Interrupt Logic And Reset datasheet (Rev. B) | PDF | HTML | 2019年 10月 29日 |
| Application brief | Best Practices: I2C Devices on an I3C Shared Bus | PDF | HTML | 2023年 3月 30日 | |
| Application note | I2C Solutions for Hot Swap Applications (Rev. A) | 2023年 1月 31日 | ||
| Application note | I2C Dynamic Addressing | 2019年 4月 25日 | ||
| Application note | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016年 9月 7日 | |
| Selection guide | I2C Infographic Flyer | 2015年 12月 3日 | ||
| Application note | Understanding the I2C Bus | PDF | HTML | 2015年 6月 30日 | |
| Application note | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015年 5月 15日 | ||
| Application note | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015年 2月 13日 |
設計與開發
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TCA9548AEVM — TCA9548A I2C 1 對 8 雙向轉換開關評估模組
The TCA9548AEVM is designed to evaluate and demonstrate the functionality of TI’s TCA954xA family of I2C switches. The TCA9548AEVM can be used as a standalone evaluation module to interface with an existing system or paired with the MSP430 Lauchpad which serves as the I2C master and power supply (...)
I2C-DESIGNER — I2C 設計工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。