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TCA9617A

現行

2 位元電平轉換 1-MHz I2C/SMBus 緩衝器/中繼器

產品詳細資料

Features Buffer, Enable pin Frequency (max) (MHz) 1 VCCA (min) (V) 0.8 VCCA (max) (V) 5.5 VCCB (min) (V) 2.2 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
Features Buffer, Enable pin Frequency (max) (MHz) 1 VCCA (min) (V) 0.8 VCCA (max) (V) 5.5 VCCB (min) (V) 2.2 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Two-channel bidirectional I2C buffer
  • Support for standard mode, fast mode (400kHz), and fast mode+ (1Mhz) I2C operation
  • Operating supply voltage range of 0.8V to 5.5V on A-side
  • Operating supply voltage range of 2.2V to 5.5V on B-side
  • Voltage-level translation from 0.8V to 5.5V and 2.2V to 5.5V
  • Footprint and function replacement for TCA9517
  • Active-high repeater-enable input
  • Open-drain I2C I/O
  • 5.5V Tolerant I2C and enable input support
  • Lockup-free operation
  • Support for clock stretching and multiple controller arbitration across the device
  • Latch-up performance exceeds 100mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 4000V Human-body model
    • 1500V Charged-device model
  • Two-channel bidirectional I2C buffer
  • Support for standard mode, fast mode (400kHz), and fast mode+ (1Mhz) I2C operation
  • Operating supply voltage range of 0.8V to 5.5V on A-side
  • Operating supply voltage range of 2.2V to 5.5V on B-side
  • Voltage-level translation from 0.8V to 5.5V and 2.2V to 5.5V
  • Footprint and function replacement for TCA9517
  • Active-high repeater-enable input
  • Open-drain I2C I/O
  • 5.5V Tolerant I2C and enable input support
  • Lockup-free operation
  • Support for clock stretching and multiple controller arbitration across the device
  • Latch-up performance exceeds 100mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 4000V Human-body model
    • 1500V Charged-device model

The TCA9617A is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. The device provides bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8V) and higher voltages (2.2V to 5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9617A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550pF to be connected in an I2C application. This device can also be used to separate two halves of a bus for voltage and capacitance.

The TCA9617A is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. The device provides bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8V) and higher voltages (2.2V to 5.5V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9617A buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550pF to be connected in an I2C application. This device can also be used to separate two halves of a bus for voltage and capacitance.

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技術文件

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類型 標題 日期
* Data sheet TCA9617A Level-Translating FM+ I2 C Bus Repeater datasheet (Rev. C) PDF | HTML 2024年 1月 10日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application note Why, When, and How to use I2C Buffers 2018年 5月 23日
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 2016年 9月 7日
Selection guide I2C Infographic Flyer 2015年 12月 3日
Application note Understanding the I2C Bus PDF | HTML 2015年 6月 30日
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015年 5月 15日
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015年 2月 13日

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模擬型號

TCA9617A IBIS Model

SCPM029.ZIP (49 KB) - IBIS Model
設計工具

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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