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DDR 記憶體電源 IC

TPS7H3302-SEP

現行

耐輻射、2.3-V 至 3.5-V 輸入、3-A 汲極和源極 DDR 終端 LDO 穩壓器

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產品規格表

TPS7H3302-SEP

現行
產品規格表 立即訂購

產品詳細資料

DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
HTSSOP (DAP) 32 89.1 mm² 11 x 8.1
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

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類型 標題 日期
* Data sheet TPS7H3302-SP and TPS7H3302-SEP 3-A DDR Radiation Hardened Termination Regulator datasheet (Rev. B) PDF | HTML 2023年 12月 14日
* Radiation & reliability report TPS7H3302-SEP and TPS7H3302-SP Neutron Displacement Damage Characterization Test Report (Rev. A) 2024年 2月 16日
* Radiation & reliability report TPS7H3302-SEP Total Ionizing Dose (TID) Radiation Report (Rev. B) 2023年 7月 11日
* VID TPS7H3302-SEP VID V62-22615 2023年 6月 9日
* Radiation & reliability report TPS7H3302-SEP Production Flow and Reliability Report PDF | HTML 2023年 5月 10日
* Radiation & reliability report Single Event Effects Report of the TPS7H3302-SEP Sink and Source DDR Termination 2023年 1月 13日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
Application note Using Space Grade Power Components to Power AMD Kintex XQRKU060 FPGA PDF | HTML 2023年 11月 8日
Application note Using Space Grade Power Components to Power Microchip RT PolarFire FPGA PDF | HTML 2023年 9月 20日
Application note Space Grade Power Solution for Microsemi RTG4 PDF | HTML 2023年 5月 2日
EVM User's guide TPS7H3002EVM (LP085) User's Guide (Rev. A) PDF | HTML 2023年 4月 27日
Certificate TPS7H3302EVM EU RoHS Declaration of Conformity (DoC) (Rev. A) 2023年 4月 11日
Application note Reduce the Risk in Low-Earth Orbit Missions with Space Enhanced Plastic Products (Rev. A) PDF | HTML 2022年 9月 15日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日

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開發板

TPS7H3302EVM — 適用於 3-A 汲極和源極 DDR 終端 LDO 穩壓器的 TPS7H3302 評估模組

TPS7H3302 (LP085) 評估模組 (EVM) 是一套評估 TPS7H3302-SEP 的性能與特性的平台，即為耐輻射 DDR、DDR2、DDR3、DDR3L 和 DDR4 終止低壓差 (LDO) 穩壓器。

使用指南: PDF | HTML
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開發板

ALPHA-3P-ADM-VA601-SPACE-AMD — Alpha Data ADM-VA601 套件，使用 AMD Versal 核心 XQRVC1902 ACAP 和 TI 耐輻射產品

外型尺寸採用 6U VPX，強調 AMD-Xilinx® Versal AI Core XQRVC1902 適應性 SoC/FPGA。ADM-VA600 為模組化機板設計，配備一個 FMC+ 連接器、DDR4 DRAM 及系統監控。零組件多數為耐輻射電源管理、介面、時脈與嵌入式處理裝置。

從：Alpha Data Parallel Systems Ltd.
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TPS7H3302-SEP PSpice Model

SLVME03.ZIP (45 KB) - PSpice Model
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