TSU6111
- Dual SP2T
- USB & UART Path support USB 2.0 High Speed
- Smart Detection
- Plug-in/Un-plug Detection
- USB Charger Detection
- Impedance Detection
- Detection is Compatible to CEA-936A
(4-Wire Protocol, UART interface)
- Charger Detection
- USB BCDv1.1 Compliant
- VBUS Detection
- Data Contact Detection
- Primary and Secondary Detection
- Compatible Accessories
- USB Cable
- UART Cable
- USB Charger BCDv1.1
- Additional Features
- I2C Interface with Host Processor
- Support Control Signals Used In Manufacturing (JIG, BOOT)
- Interrupt for Attach and Detach Accessory
- Max Voltage
- 28v VBUS rating
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
- ESD Performance DP/DM/ID/VBUS to GND
- ±8kV Contact Discharge (IEC 61000-4-2)
- Surge Protection on VBUS/DP/DM
- USB Connector Pins Without External Components
The TSU6111 is a differential high performance automated SP2T switch with impedance detection. The switch features impedance detection which supports the detection of various accessories that are attached through DP, DM and ID. The charger detection satisfies USB charger specification v1.1. VBUS_IN has 28V tolerance to avoid external protection.
Power for this device is supplied through VBAT of the system or through VBUS_IN when attached.
The switch is controlled by automatic detection logic or through I2C manually. JIG and BOOT pins are used when a USB, UART JIG cable is used to test in the development and manufacturing. TSU6111 has open-drain JIG output (active low).
技術文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SP2T SWITCH WITH IMPEDANCE DETECTION MICRO-USB SWITCH TO SUPPORT USB, UART datasheet | 2011年 9月 6日 | |
Application note | High-Speed Interface Layout Guidelines (Rev. J) | PDF | HTML | 2023年 2月 24日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
UQFN (RSV) | 16 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點