UCC27511A
- Input Pins Capable of Withstanding –5V Below GND pin
- Low-Cost Gate-Driver Device Offering Superior Replacement of NPN and PNP Discrete Solutions
- Strong Sink Current Offers Enhanced Immunity Against Miller Turnon
- Split Output Configuration (Allows Easy and Independent Adjustment of Turnon and Turnoff Speeds)
- Fast Propagation Delays (13ns typical)
- Fast Rise and Fall Times (8ns and 7ns typical)
- 4.5V to 18V Single Supply Range
- Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
- TTL and CMOS Compatible Input-Logic Threshold (Independent of Supply Voltage)
- Wide Hysteresis (1V typical) for High-Noise Immunity
- Dual-Input Design (Choice of an Inverting (IN– Pin) or Non-Inverting (IN+ Pin) Driver Configuration)
- Unused Input Pin can be Used for Enable or Disable Function
- Output Held Low when Input Pins are Floating
- Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
The UCC27511A device is a compact gate driver that offers superior replacement of NPN and PNP discrete driver (buffer circuit) solutions. The UCC27511A device is a single-channel low-side, high-speed gate driver rated for MOSFETs, IGBTs, and emerging wide-bandgap power devices such as GaN. The device features fast rise times, fall times, and propagation delays, making the UCC27511A device suitable for high-speed applications. Its asymmetrical 4A peak source and 8A peak sink currents boost immunity against parasitic Miller turnon effect. The split output configuration enables easy and independent adjustment of rise and fall times using only two resistors and eliminating the need for an external diode. Features including wide input hysteresis and negative input voltage handling enhance transient immunity.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | UCC27511A Single-Channel High-Speed Low-Side Gate Driver With 4A Peak Source and 8A Peak Sink datasheet (Rev. A) | PDF | HTML | 2024年 1月 17日 |
Application note | Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs | PDF | HTML | 2024年 1月 22日 | |
Application note | Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) | PDF | HTML | 2023年 9月 8日 | |
Application note | Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver | PDF | HTML | 2021年 11月 10日 | |
Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020年 2月 28日 | ||
Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020年 2月 28日 | ||
Application brief | How to overcome negative voltage transients on low-side gate drivers' inputs | 2019年 1月 18日 | ||
Application brief | Enable Function with Unused Differential Input | 2018年 7月 11日 | ||
Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 2018年 3月 16日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TIDA-01081 — 機械視覺的 LED 照明控制參考設計
TIDA-01415 — 100W、高解析度、16 位元色彩可調、0.15% 可調光 RGBW LED 照明燈具參考設計
TIDA-00520 — 300-W PFC 與諧振 LLC 半橋控制器離線 AC/DC PSU 模組
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。