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UCC27710

現行

具有連鎖功能的 0.5-A/1.0-A、620-V 半橋閘極驅動器

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產品詳細資料

Bootstrap supply voltage (max) (V) 620 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 22 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 35 Fall time (ns) 16 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 620 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 22 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 35 Fall time (ns) 16 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

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類型 標題 日期
* Data sheet UCC27710 620-V, 0.5-A, 1.0-A High-Side Low-Side Gate Driver with Interlock datasheet (Rev. B) PDF | HTML 2018年 8月 30日
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 2024年 4月 4日
Application note Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 2024年 3月 25日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application note How to Choose a Gate Driver for DC Motor Drives PDF | HTML 2023年 10月 5日
Application note Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 2023年 9月 8日
Application note Voltage Fed Full Bridge DC-DC & DC-AC Converter High-Freq Inverter Using C2000 (Rev. D) 2021年 4月 7日
More literature Troubleshooting gate drive circuits in automotive and industrial applications 2021年 3月 23日
Application note Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. 2020年 5月 12日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse PDF | HTML 2018年 9月 19日
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadti PDF | HTML 2018年 5月 30日
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage PDF | HTML 2018年 4月 17日
EVM User's guide UCC27710EVM-005 Evaluation Module (Rev. A) 2017年 10月 25日

設計與開發

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開發板

UCC27710EVM-005 — UCC27710 620V、0.5A、1.0A 高壓側低壓側閘極驅動器評估模組

UCC27710EVM-005 is designed for evaluating UCC27710D, which is a 620V half bridge gate driver with adequate source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
使用指南: PDF
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模擬型號

UCC27710 PSpice Transient Model

SLUM591.ZIP (69 KB) - PSpice Model
模擬型號

UCC27710 Unencrypted PSpice Transient Model

SLUM634.ZIP (3 KB) - PSpice Model
配置圖

UCC2771x Schematic Review Template

SLURB13.ZIP (63 KB)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian

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