USBN9603
- Low EMI, low standby current, 24 MHz oscillator
- Advanced DMA mechanism
- Fully static HALT mode with asynchronous wake-up for bus powered operation
- 5V or 3.3V operation
- Improved input range 3.3V signal voltage regulator
- All unidirectional FIFOs are 64 bytes
- Power-up reset and startup delay counter simplify system design
- Simple programming model controlled by external controller
- Available in two packages
- USBN9603/4SLB: small footprint for new designs and portable applications
- USBN9603/4-28M: standard package, pin-to-pin compatible with USBN9602-28M
The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.
The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.
The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | USBN9603 USBN9604 USB Full Speed Node Controller w/Enhanced DMA Support datasheet (Rev. L) | 2009年 10月 27日 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點