TPS3828
Spannungsüberwachung mit Watchdog-Timer
TPS3828
- Power-on reset generator with a fixed delay time of 200 ms (TPS3823, TPS3824, TPS3825, and TPS3828) or 25 ms (TPS3820)
- Manual reset input (TPS3820, TPS3823, TPS3825, and TPS3828)
- Reset output available in active-low (TPS3820, TPS3823, TPS3824, and TPS3825), active-high (TPS3824 and TPS3825), and open drain (TPS3828)
- Supply voltage supervision range: 2.5 V, 3 V, 3.3 V, 5 V
- Watchdog timer (TPS3820, TPS3823, TPS3824, and TPS3828)
- Supply current of 15 µA (typical)
- 5-pin SOT-23 package
- Temperature range: −40°C to 85°C (−40°C to 125°C for TPS3823A-33)
The TPS382x family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power on, RESET asserts when the supply voltage VDD becomes greater than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active low as long as VDD remains less than the threshold voltage, VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage (VIT− + VHYS). When the supply voltage drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT–, set by an internal voltage divider. The TPS382x family also offers watchdog time out options of 200 ms (TPS3820) and 1.6 s (TPS3823, TPS3824, and TPS3828).
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System on Module for Industrial Power Line Communication (CENELEC) CAD Files
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System on Module for Power Line Communication (CENELEC Freq. Band) Gerber Files
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System on Module for Industrial Power Line Communication (CENELEC) Layer Plots
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System on Module for Power Line Communication (CENELEC Freq. Band) PCB Layout
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