Startseite Energiemanagement Linear- und Low-Dropout-Regler (LDO)

TPS74801

AKTIV

Einstellbarer Low-Dropout-Spannungsregler (LDO), 1,5 A, niedrige VIN (0,8 V), mit Power Good und Akt

Eine neuere Version dieses Produkts ist verfügbar

Drop-In-Ersatz mit verbesserter Funktionalität im Gegensatz zum verglichenen Baustein
TPS748A AKTIV Einstellbarer Low-Dropout-Spannungsregler (LDO), 1,5 A, 0,8 V, mit Power Good und Aktivierungseingan Improved accuracy and noise

Produktdetails

Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 Iq (typ) (mA) 1 Thermal resistance θJA (°C/W) 36 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 2 PSRR at 100 KHz (dB) 28 Dropout voltage (Vdo) (typ) (mV) 60 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 Iq (typ) (mA) 1 Thermal resistance θJA (°C/W) 36 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Power good, Soft start Accuracy (%) 2 PSRR at 100 KHz (dB) 28 Dropout voltage (Vdo) (typ) (mV) 60 Operating temperature range (°C) -40 to 125
VQFN (RGW) 20 25 mm² 5 x 5 VSON (DRC) 10 9 mm² 3 x 3
  • VOUT range: 0.8V to 3.6V
  • Ultra-low VIN range: 0.8V to 5.5V
  • VBIAS range 2.7V to 5.5V
  • Low dropout: 60 mV typical at 1.5A, VBIAS = 5V
  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • 1% accuracy over line, load, and temperature (new chip)
  • 2% accuracy over line, load, and temperature (legacy chip)
  • Programmable soft-start provides linear voltage start-up
  • VBIAS permits low VIN operation with good transient response
  • Stable with any output capacitor ≥ 2.2µF
  • Available in small, 3mm × 3mm × 1mm VSON-10 and 5mm × 5mm VQFN-20 packages
  • VOUT range: 0.8V to 3.6V
  • Ultra-low VIN range: 0.8V to 5.5V
  • VBIAS range 2.7V to 5.5V
  • Low dropout: 60 mV typical at 1.5A, VBIAS = 5V
  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • 1% accuracy over line, load, and temperature (new chip)
  • 2% accuracy over line, load, and temperature (legacy chip)
  • Programmable soft-start provides linear voltage start-up
  • VBIAS permits low VIN operation with good transient response
  • Stable with any output capacitor ≥ 2.2µF
  • Available in small, 3mm × 3mm × 1mm VSON-10 and 5mm × 5mm VQFN-20 packages

The TPS748 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows a solution to be configured that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy (new chip) over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2µF, and is fully specified for TJ = –40°C to +125°C. The TPS748 is offered in a small, 3mm × 3mm, VSON-10 package, yielding a highly compact, total solution size. The device is also available in a 5mm × 5mm VQFN-20 package for compatibility with the TPS742.

The TPS748 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows a solution to be configured that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy (new chip) over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2µF, and is fully specified for TJ = –40°C to +125°C. The TPS748 is offered in a small, 3mm × 3mm, VSON-10 package, yielding a highly compact, total solution size. The device is also available in a 5mm × 5mm VQFN-20 package for compatibility with the TPS742.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TPS748 1.5A, Low-Dropout Linear Regulator With Programmable Soft-Start datasheet (Rev. N) PDF | HTML 21 Jun 2024
EVM User's guide TPS74701EVM-177, TPS74801EVM-177 Evaluation Module (Rev. B) PDF | HTML 08 Mai 2023
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note Point-of-Load Solutions for Data Center App Implementing VR13.HC Vccin Spec (Rev. A) PDF | HTML 08 Jan 2020
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Application note Extracting a Lumped Output Impedance Model With SIMPLIS or SiMetrix 11 Jun 2018
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mär 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
Application note Power Solution using LDO's (Rev. A) 25 Mär 2010
Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) 11 Sep 2009
Application note Simple Power Solution Using LDOs for the DM365 04 Aug 2009
Application note Simple Power Solution Using LDOs For TMS320C2834x MCU 24 Jul 2009
Analog Design Journal Q3 2007 Issue Analog Applications Journal 10 Aug 2007
Analog Design Journal Simultaneous power-down sequencing with the TPS74x01 family of linear regulators 10 Aug 2007

Design und Entwicklung

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Simulationsmodell

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SLIM032B.ZIP (58 KB) - PSpice Model
Simulationsmodell

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Simulationsmodell

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Simulationsmodell

TPS74801 Unencrypted PSpice Transient Model

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Schaltplan

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VQFN (RGW) 20 Ultra Librarian
VSON (DRC) 10 Ultra Librarian

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