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The LM2742 is a high-speed, synchronous, switching regulator controller. It is intended to control currents of 0.7A to 20A with up to 95% conversion efficiencies. Power up and down sequencing is achieved with the power-good flag, adjustable soft-start and output enable features. The LM2742 operates from a low-current 5V bias and can convert from a 1V to 16V power rail. The part utilizes a fixed-frequency, voltage-mode, PWM control architecture and the switching frequency is adjustable from 50kHz to 2MHz by setting the value of an external resistor. Current limit is achieved by monitoring the voltage drop across the on-resistance of the low-side MOSFET, which enables on-times on the order of 40ns, one of the best in the industry. The wide range of operating frequencies gives the power supply designer the flexibility to fine-tune component size, cost, noise and efficiency. The adaptive, non-overlapping MOSFET gate-drivers and high-side bootstrap structure helps to further maximize efficiency. The high-side power FET drain voltage can be from 1V to 16V and the output voltage is adjustable down to 0.6V.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | LM2742 N-Chan FET Synch Buck Reg Cntrlr for Low Output Voltages datasheet (Rev. C) | 28 mar 2013 | |
| White paper | Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) | PDF | HTML | 30 abr 2024 | |
| User guide | LM2742 Buck Controller Evaluation Module User's Guide (Rev. B) | PDF | HTML | 24 ene 2022 | |
| Selection guide | Power Management Guide 2018 (Rev. R) | 25 jun 2018 | ||
| Analog Design Journal | Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics | 21 jul 2016 | ||
| Application note | Automated Frequency Response Analyzer | 09 oct 2013 | ||
| Application note | AN-1603 LM274X Reference Designs (Rev. C) | 01 may 2013 | ||
| Application note | Current Limit Foldback Improves Short Circuit Protection in LM274X Family (Rev. B) | 23 abr 2013 | ||
| Application note | Optmiz Pwr Cntrlr Dsigns thru Utiliz Freq & Sync, Ext Ref, Trking & Precis EN | 24 abr 2008 | ||
| Application note | Power Management Considerations for FPGAs and ASICs | 22 mar 2007 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| TSSOP (PW) | 14 | Ultra Librarian |
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