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TPS650864

ACTIVO

PMIC multicarril configurable para MPSoC Xilinx y FPGA

Detalles del producto

Processor supplier Xilinx Processor name Artix-7, Zynq Ultrascale+ Regulated outputs (#) 12, 13 Step-down DC/DC converter 3 Step-up DC/DC converter 0 LDO 4 Vin (min) (V) 5.6 Vin (max) (V) 21 Vout (min) (V) -0.3 Vout (max) (V) 5 Iout (max) (A) 25 Configurability Factory programmable, Software configurable Features Comm control, Dynamic voltage scaling, Enable, Enable pin, I2C control, Overcurrent protection, Power good, Power sequencing, Synchronous rectification, Thermal shutdown, UVLO fixed Rating Catalog Operating temperature range (°C) -40 to 85 Step-down DC/DC controller 3 Step-up DC/DC controller 0 Iq (typ) (mA) 0.3 Switching frequency (max) (kHz) 3100 Shutdown current (ISD) (typ) (µA) 65 Switching frequency (typ) (kHz) 2500 Product type Processor and FPGA
Processor supplier Xilinx Processor name Artix-7, Zynq Ultrascale+ Regulated outputs (#) 12, 13 Step-down DC/DC converter 3 Step-up DC/DC converter 0 LDO 4 Vin (min) (V) 5.6 Vin (max) (V) 21 Vout (min) (V) -0.3 Vout (max) (V) 5 Iout (max) (A) 25 Configurability Factory programmable, Software configurable Features Comm control, Dynamic voltage scaling, Enable, Enable pin, I2C control, Overcurrent protection, Power good, Power sequencing, Synchronous rectification, Thermal shutdown, UVLO fixed Rating Catalog Operating temperature range (°C) -40 to 85 Step-down DC/DC controller 3 Step-up DC/DC controller 0 Iq (typ) (mA) 0.3 Switching frequency (max) (kHz) 3100 Shutdown current (ISD) (typ) (µA) 65 Switching frequency (typ) (kHz) 2500 Product type Processor and FPGA
VQFN (RSK) 64 64 mm² 8 x 8
  • Wide VIN range from 5.6V to 21V
  • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology
    • Scalable output current using external fets with selectable current limit
    • I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps
  • Three variable-output voltage synchronous step-down converters with dcs-control topology
    • VIN range from 3V to 5.5V
    • Up to 3 A of output current
    • I2C DVS control from 0.41V to 1.67V in 10mV steps or 0.425V to 3.575V in 25mV steps
  • Three LDO regulators with adjustable output voltage
    • LDOA1: I2C-selectable voltage from 1.35V to 3.3V for up to 200mA of output current
    • LDOA2 and LDOA3: I2C-selectable voltage from 0.7V to 1.5V for up to 600mA of output current each
  • VTT LDO for DDR memory termination
  • Three load switches with slew rate control
    • Up to 300mA of output current with voltage drop less than 1.5% of nominal input voltage
    • RDSON < 96mΩ at input voltage of 1.8V
  • 5V fixed-output voltage LDO (LDO5)
    • Power supply for gate drivers of SMPS and for LDOA1
    • Automatic switch to external 5V buck for higher efficiency
  • Built-in flexibility and configurability by factory OTP programming
    • Six GPI pins configurable to enable (CTL1 to CTL6) or sleep mode entry (CTL3 and CTL6) of any selected rails
    • Four GPO pins configurable to power good of any selected rails
    • Open-drain interrupt output pin
  • I2C interface supports standard mode (100 kHz), fast mode (400 kHz), and fast mode plus (1MHz)
  • Wide VIN range from 5.6V to 21V
  • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology
    • Scalable output current using external fets with selectable current limit
    • I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps
  • Three variable-output voltage synchronous step-down converters with dcs-control topology
    • VIN range from 3V to 5.5V
    • Up to 3 A of output current
    • I2C DVS control from 0.41V to 1.67V in 10mV steps or 0.425V to 3.575V in 25mV steps
  • Three LDO regulators with adjustable output voltage
    • LDOA1: I2C-selectable voltage from 1.35V to 3.3V for up to 200mA of output current
    • LDOA2 and LDOA3: I2C-selectable voltage from 0.7V to 1.5V for up to 600mA of output current each
  • VTT LDO for DDR memory termination
  • Three load switches with slew rate control
    • Up to 300mA of output current with voltage drop less than 1.5% of nominal input voltage
    • RDSON < 96mΩ at input voltage of 1.8V
  • 5V fixed-output voltage LDO (LDO5)
    • Power supply for gate drivers of SMPS and for LDOA1
    • Automatic switch to external 5V buck for higher efficiency
  • Built-in flexibility and configurability by factory OTP programming
    • Six GPI pins configurable to enable (CTL1 to CTL6) or sleep mode entry (CTL3 and CTL6) of any selected rails
    • Four GPO pins configurable to power good of any selected rails
    • Open-drain interrupt output pin
  • I2C interface supports standard mode (100 kHz), fast mode (400 kHz), and fast mode plus (1MHz)

The TPS650864 device family is a single-chip power-management IC (PMIC) designed for Xilinx Zynq multiprocessor system-on-chip (MPSoCs) and field programmable gate array (FPGA) families. The TPS650864 offers an input range of 5.6V to 21V, enabling a wide range of applications (see the Device Comparison Table). The device is targeted for wall-powered applications or 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures). See the Typical Application section for 5V input supplies. The D-CAP2 and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. An I2C interface allows simple control either by an embedded controller (EC) or by an SoC. The PMIC comes in an 8mm × 8mm, single-row VQFN package with thermal pad for good thermal dissipation.

The TPS650864 device family is a single-chip power-management IC (PMIC) designed for Xilinx Zynq multiprocessor system-on-chip (MPSoCs) and field programmable gate array (FPGA) families. The TPS650864 offers an input range of 5.6V to 21V, enabling a wide range of applications (see the Device Comparison Table). The device is targeted for wall-powered applications or 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures). See the Typical Application section for 5V input supplies. The D-CAP2 and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. An I2C interface allows simple control either by an embedded controller (EC) or by an SoC. The PMIC comes in an 8mm × 8mm, single-row VQFN package with thermal pad for good thermal dissipation.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TPS650864 Configurable Multirail PMU for Xilinx MPSoCs and FPGAs datasheet (Rev. F) PDF | HTML 18 oct 2024
Application note Using TPS65086x PMIC to Power Xilinx Zynq UltraScale+ MPSoCs PDF | HTML 28 oct 2021
Application note Push-Button Circuit (Rev. B) 01 nov 2017
Application note TPS65086x Schematic and Layout Checklist (Rev. A) 02 dic 2015
White paper Power management integrated buck controllers for distant point-of-load apps 14 ago 2015

Diseño y desarrollo

Soluciones de alimentación

Explore las soluciones que incluyan el TPS650864. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Placa de evaluación

TPS650860EVM-116 — Módulo de evaluación TPS650860

Evaluation Module (EVM) for the TPS65086x family. The EVM provides a platform for engineers to evaluate, test, and explore the TPS650860 in a real world application use. All of the sequencing and functionality required for the processor and system is demonstrated on this board. This EVM also (...)

Guía del usuario: PDF
Modelo de simulación

Flotherm Model for TPS65086x products

SWCM008.ZIP (0 KB) - Thermal Model
Diseños de referencia

TIDA-01393 — Diseño de referencia de potencia para aplicaciones Xilinx® Zynq® UltraScale+™ MPSoC

Este diseño de referencia es una solución de potencia configurable diseñada para manejar toda la familia de dispositivos de sistema en chip con multiprocesador (MPSoC) Xilinx® Zynq® UltraScale+ (ZU+) en diversos casos de uso.

Las diversas versiones del circuito integrado de administración de (...)

Design guide: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
VQFN (RSK) 64 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

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