計算工具
TPS40040
- 2.25-V to 5.5-V Input
- Output Voltage from 0.6 V to 90% of VIN
- High-Side Drive for N-Channel FET
- Supports Pre-Biased Outputs
- Adaptive Anti-Cross Conduction Gate Drive
- 1%, 0.6-V Reference
- Two Fixed Switching Frequency Versions, TPS40040 (300 kHz) and TPS40041 (600 kHz)
- Three Selectable Short Circuit Protection Levels of 105 mV, 180 mV and 310 mV
- Hiccup Restart from Faults
- Voltage Mode Control
- Active Low Enable
- Thermal Shutdown Protection at 145°C
- 8-Pin, 3-mm × 3-mm SON with Ground Connection to Thermal Pad
- APPLICATIONS
- Point of Load
- Telecommunications
- DC to DC Modules
- Set Top Boxes
PowerPAD Is a trademark of Texas Instruments.
Predictive Gate Drive Is a trademark of Texas Instruments.
The TPS40040 and TPS40041 dc-to-dc controllers are designed to operate from a 2.25-V to 5.5-V input source. To reduce the number of external components, several operating parameters are fixed internally; namely, frequency, soft start time, and short circuit protection (SCP) levels. For example, the operating frequencies of TPS40040/1 are 300 kHz/600 kHz, respectively.
One of three short circuit threshold levels may be selected by the addition of an external resistor from the COMP pin to circuit ground. During power on, and before the internal soft start commands the output voltage to rise, the TPS40040/1 enters a calibration cycle, measures the current out of the COMP pin, and selects an internal SCP threshold voltage. At the end of the 1.6-ms calibration time, the output voltage is allowed to rise for a 4-ms soft start. During operation, the selected SCP threshold voltage is compared to the upper MOSFET’s voltage drop during its ON time to determine whether there is an overload condition.
The packaging of the TPS40040/1 is unique in that the PowerPAD™ is used as an electrical ground connection as well as a thermal connection.
技術文件
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檢視所有 7 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Low Pin Count, Low VIN (2.5V to 5.5V Synchronous Buck DC-to-DC Controller datasheet (Rev. D) | 2007年 12月 12日 | |
| Analog Design Journal | Control-Mode Quick Reference Guide (Rev. B) | PDF | HTML | 2023年 8月 29日 | |
| Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
| Selection guide | DC/DC Buck Controller Solutions Selection Guide | 2018年 2月 6日 | ||
| Application note | Analysis and Design of Input Filter for DC-DC Circuit | 2017年 11月 27日 | ||
| EVM User's guide | Using the TPS40040-EVM-001 | 2007年 1月 29日 | ||
| User guide | A 5-V Input, 1.8-V Output, 6-A Synchronous Buck Converter | 2006年 4月 10日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
TPS40040EVM-001 — 5V 輸入、1.8V 輸出、10A 同步降壓評估模組
The TPS40040EVM-001 evaluation module (EVM) is a synchronous buck converter providing a fixed1.8 V output at up to 10 A from a 5 V input bus. The EVM is designed to start up from a single supply, so no additional bias voltage is required for startup. The module uses the TPS40040 (...)
使用指南: PDF
開發板
TPS40041EVM-001 — TPS40041 5V 輸入、1.8V 輸出、6A 評估模組
The TPS40041EVM-001 evaluation module (EVM) is a synchronous buck converter providing a fixed1.8 V output at up to 6 A from a 5 V input bus or 3 A from a 3.3 V input. The EVM is designed to start up from a single supply, so no additional bias voltage is required for (...)
使用指南: PDF
模擬型號
TPS40040 TINA-TI Average Reference Design (Rev. A)
SLVJ009A.TSC (566 KB) - TINA-TI Reference Design
模擬型號
TPS40040 Unencrypted PSpice Transient Model Package (Rev. A)
SLVM032A.ZIP (67 KB) - PSpice Model
模擬型號
TPS40040/1 Unencrypted PSpice Average Model Package (Rev. A)
SLVJ008A.ZIP (108 KB) - PSpice Model
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點