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低壓側驅動器

UC1707-SP

現行

具 40-V VDD 及輸出鎖存的抗輻射 QMLV、1.5-A/1.5-A 雙通道閘極驅動器

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產品規格表

UC1707-SP

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 1.5 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 40 Features Analog Shutdown with Optional Latch, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 40 Input threshold TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 1.5 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 40 Features Analog Shutdown with Optional Latch, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 40 Input threshold TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CFP (W) 16 69.319 mm² 10.3 x 6.73 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Rad-Tolerant: 50 kRad (Si) for 5962-
    8761903VEA, 5962-8761903VFA(1)
  • QML-V Qualified, SMD
    (5962-8761901VEA, 5962-8761903VEA,
    5962-8761903VFA, 5962-8761901V2A)
  • Two Independent Drivers
  • 1.5-A Totem Pole Outputs
  • Inverting and Non-Inverting Inputs
  • 40-ns Rise and Fall Into 1000 pF
  • High-Speed, Power MOSFET Compatible
  • Low Cross-Conduction Current Spike
  • Analog Shutdown With Optional Latch
  • Low Quiescent Current
  • 5-V to 40-V Operation
  • Thermal Shutdown Protection
  • 16-Pin Dual-In-Line Package
  • Rad-Tolerant: 50 kRad (Si) for 5962-
    8761903VEA, 5962-8761903VFA(1)
  • QML-V Qualified, SMD
    (5962-8761901VEA, 5962-8761903VEA,
    5962-8761903VFA, 5962-8761901V2A)
  • Two Independent Drivers
  • 1.5-A Totem Pole Outputs
  • Inverting and Non-Inverting Inputs
  • 40-ns Rise and Fall Into 1000 pF
  • High-Speed, Power MOSFET Compatible
  • Low Cross-Conduction Current Spike
  • Analog Shutdown With Optional Latch
  • Low Quiescent Current
  • 5-V to 40-V Operation
  • Thermal Shutdown Protection
  • 16-Pin Dual-In-Line Package

The UC1707-SP power driver is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices – particularly power MOSFETs. The UC1707-SP contains two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin.

Supply voltage for both VIN and VC can independently range from 5 to 40 V.

The UC1707-SP power driver is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices – particularly power MOSFETs. The UC1707-SP contains two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin.

Supply voltage for both VIN and VC can independently range from 5 to 40 V.
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類型 標題 日期
* Data sheet UC1707-SP Dual-Channel Power Driver datasheet (Rev. A) PDF | HTML 2016年 3月 21日
* Radiation & reliability report UC1707-SP (5962-8761903VEA) Neutron Displacement Damage Characterization 2017年 11月 30日
* SMD UC1707-SP SMD 5962-87619 2016年 7月 8日
* Radiation & reliability report UC1707-SP ELDRS Report 2015年 3月 31日
* Radiation & reliability report UC1707-SP SEE Report 2015年 3月 31日
Application brief DLA Approved Optimizations for QML Products (Rev. B) PDF | HTML 2024年 10月 23日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note QML flow, its importance, and obtaining lot information (Rev. C) 2023年 8月 30日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 2020年 8月 21日
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form PDF | HTML 2020年 5月 18日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日

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UC1707 Unencrypted PSpice Transient Model

SLUM648.ZIP (3 KB) - PSpice Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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CDIP (J) 16 Ultra Librarian
CFP (W) 16 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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