UCC21540
- Wide body package options
- DW SOIC-16: pin-2-pin to UCC21520
- DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
- Up to 4-A peak source and 6-A peak sink output
- Up to 18-V VDD output drive supply
- 5-V and 8-V VDD UVLO Options
- CMTI greater than 100 V/ns
- Switching parameters:
- 40-ns maximum propagation delay
- 5-ns maximum delay matching
- 5.5-ns maximum pulse-width distortion
- 35-µs maximum VDD power-up delay
- Resistor-programmable dead time
- TTL and CMOS compatible inputs
- Safety-related certifications:
- 8000-VPK reinforced isolation per DIN V VDE V 0884-11:2017-01
- 5700-VRMS isolation for 1 minute per UL 1577
- CQC certification per GB4943.1-2011
The UCC2154x is an isolated dual channel gate driver family designed with up to 4-A/6-A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing which facilitates higher bus voltage.
The UCC2154xfamily can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 100-V/ns common-mode transient immunity (CMTI).
Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, integrated de-glitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
技術文件
設計與開發
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UCC21540EVM — 具有 3.3mm 通道至通道間距的 5.0-kVrms 絕緣式雙通道閘極驅動器
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (DW) | 16 | Ultra Librarian |
SOIC (DWK) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。