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低壓側驅動器

UCC27611

現行

具 4-V UVLO 和 5-V 穩壓輸出的 4-A/6-A 單通道閘極驅動器

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產品規格表

UCC27611

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 1 Power switch GaNFET, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Regulated gate driver voltage, Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 4 Propagation delay time (µs) 0.014 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Low Side
Number of channels 1 Power switch GaNFET, MOSFET Peak output current (A) 6 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Regulated gate driver voltage, Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 4 Propagation delay time (µs) 0.014 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Low Side
WSON (DRV) 6 4 mm² 2 x 2
  • Enhancement Mode Gallium Nitride FETs (eGANFETs)
  • 4-V to 18-V Single Supply Range VDD Range
  • Drive Voltage VREF Regulated to 5 V
  • 4-A Peak Source and 6-A Peak Sink Drive Current
  • 1-Ω and 0.35-Ω Pullup and Pulldown Resistance (Maximize High Slew-Rate dV and dt Immunity)
  • Split Output Configuration (Allows Turnon and Turnoff Optimization for Individual FETs)
  • Fast Propagation Delays (14-ns Typical)
  • Fast Rise and Fall Times (9-ns and 5-ns Typical)
  • TTL and CMOS Compatible Inputs (Independent of Supply Voltage Allow Easy Interface-to-Digital and Analog Controllers)
  • Dual-Input Design Offering Drive Flexibility (Both Inverting and Noninverting Configurations)
  • Output Held Low When Inputs Are Floating
  • VDD Under Voltage Lockout (UVLO)
  • Optimized Pinout Compatible With eGANFET Footprint for Easy Layout
  • 2.00 mm × 2.00 mm SON-6 Package With Exposed Thermal and Ground Pad, (Minimized Parasitic Inductances to Reduce Gate Ringing)
  • Operating Temperature Range of –40°C to 140°C
  • Enhancement Mode Gallium Nitride FETs (eGANFETs)
  • 4-V to 18-V Single Supply Range VDD Range
  • Drive Voltage VREF Regulated to 5 V
  • 4-A Peak Source and 6-A Peak Sink Drive Current
  • 1-Ω and 0.35-Ω Pullup and Pulldown Resistance (Maximize High Slew-Rate dV and dt Immunity)
  • Split Output Configuration (Allows Turnon and Turnoff Optimization for Individual FETs)
  • Fast Propagation Delays (14-ns Typical)
  • Fast Rise and Fall Times (9-ns and 5-ns Typical)
  • TTL and CMOS Compatible Inputs (Independent of Supply Voltage Allow Easy Interface-to-Digital and Analog Controllers)
  • Dual-Input Design Offering Drive Flexibility (Both Inverting and Noninverting Configurations)
  • Output Held Low When Inputs Are Floating
  • VDD Under Voltage Lockout (UVLO)
  • Optimized Pinout Compatible With eGANFET Footprint for Easy Layout
  • 2.00 mm × 2.00 mm SON-6 Package With Exposed Thermal and Ground Pad, (Minimized Parasitic Inductances to Reduce Gate Ringing)
  • Operating Temperature Range of –40°C to 140°C

The UCC27611 is a single-channel, high-speed, gate driver optimized for 5-V drive, specifically addressing enhancement mode GaN FETs. The drive voltage VREF is precisely controlled by internal linear regulator to 5 V. The UCC27611 offers asymmetrical rail-to-rail peak current drive capability with 4-A source and 6-A sink. Split output configuration allows individual turnon and turnoff time optimization depending on FET. Package and pinout with minimum parasitic inductances reduce the rise and fall time and limit the ringing. Additionally, the short propagation delay with minimized tolerances and variations allows efficient operation at high frequencies. The 1-Ω and 0.35-Ω resistance boosts immunity to hard switching with high slew rate dV and dt.

The independence from VDD input signal thresholds ensure TTL and CMOS low-voltage logic compatibility. For safety reason, when the input pins are in a floating condition, the internal input pullup and pulldown resistors hold the output LOW. Internal circuitry on VREF pin provides an undervoltage lockout function that holds output LOW until VREF supply voltage is within operating range. UCC27611 is offered in a small 2.00 mm × 2.00 mm SON-6 package (DRV) with exposed thermal and ground pad that improves the package power-handling capability. The UCC27611 operates over wide temperature range from –40°C to 140°C.

The UCC27611 is a single-channel, high-speed, gate driver optimized for 5-V drive, specifically addressing enhancement mode GaN FETs. The drive voltage VREF is precisely controlled by internal linear regulator to 5 V. The UCC27611 offers asymmetrical rail-to-rail peak current drive capability with 4-A source and 6-A sink. Split output configuration allows individual turnon and turnoff time optimization depending on FET. Package and pinout with minimum parasitic inductances reduce the rise and fall time and limit the ringing. Additionally, the short propagation delay with minimized tolerances and variations allows efficient operation at high frequencies. The 1-Ω and 0.35-Ω resistance boosts immunity to hard switching with high slew rate dV and dt.

The independence from VDD input signal thresholds ensure TTL and CMOS low-voltage logic compatibility. For safety reason, when the input pins are in a floating condition, the internal input pullup and pulldown resistors hold the output LOW. Internal circuitry on VREF pin provides an undervoltage lockout function that holds output LOW until VREF supply voltage is within operating range. UCC27611 is offered in a small 2.00 mm × 2.00 mm SON-6 package (DRV) with exposed thermal and ground pad that improves the package power-handling capability. The UCC27611 operates over wide temperature range from –40°C to 140°C.
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類型 標題 日期
* Data sheet UCC27611 5-V, 4-A to 6-A Low Side GaN Driver datasheet (Rev. F) PDF | HTML 2018年 3月 12日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023年 9月 8日
Application brief GaN Applications PDF | HTML 2022年 8月 10日
Application brief GaN Driver Schematic and Layout Recommendations PDF | HTML 2022年 8月 10日
Application brief Key Parameters and Driving Requirements of GaN FETs PDF | HTML 2022年 8月 4日
Application brief Nomenclature, Types, and Structure of GaN Transistors PDF | HTML 2022年 8月 4日
Application brief How GaN Enables More Efficient and Reduced Form Factor Power Supplies PDF | HTML 2022年 8月 2日
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021年 11月 10日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application note GaN Gate Driver Layout Help 2019年 5月 23日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Application brief Enable Function with Unused Differential Input 2018年 7月 11日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018年 3月 16日
Technical article How to achieve higher system efficiency- part two: high-speed gate drivers PDF | HTML 2017年 1月 31日
White paper A comprehensive methodology to qualify the reliability of GaN products 2015年 3月 2日
White paper Advancing Power Supply Solutions Through the Promise of GaN 2015年 2月 24日
EVM User's guide Using the UCC27611OLEVM-203 2012年 11月 29日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LMG1020EVM-006 — LMG1020 GaN 低壓側驅動器 + GaN FET 光達評估模組

The LMG1020EVM-006 is a small, easy-to-use power stage for LIDAR laser drive. The EVM includes an integrated resistive load, (laser not included) and takes a short-pulse input that can either be buffered (and shortened further), or passed directly to the power stage. The board can demonstrate (...)
使用指南: PDF
TI.com 無法提供
開發板

UCC27611OLEVM-203 — UCC27611 閘極驅動器開迴路評估模組

The UCC27611OLEVM-203 aids in the evaluation of high-speed, single channel, low-side driver capable of driving eGANFETs with a regulated 5-V optimized output. The EVM is designed to drive a capacitive load on the output of the UCC27611 device, with connectors provided to offer flexibility to bring (...)
使用指南: PDF
TI.com 無法提供
模擬型號

UCC27611 PSpice Transient Model (Rev. C)

SLUM339C.ZIP (45 KB) - PSpice Model
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模擬型號

UCC27611 TINA-TI Transient Reference Design (Rev. E)

SLUM362E.TSC (761 KB) - TINA-TI Reference Design
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模擬型號

UCC27611 TINA-TI Transient Spice Model (Rev. B)

SLUM363B.ZIP (5 KB) - TINA-TI Spice Model
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模擬型號

UCC27611 Unencrypted PSpice Transient Model (Rev. B)

SLUM487B.ZIP (2 KB) - PSpice Model
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計算工具

SLURB16 — UCC27611 Schematic Review Template

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產品
低壓側驅動器
UCC27611 — 具 4-V UVLO 和 5-V 穩壓輸出的 4-A/6-A 單通道閘極驅動器
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

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在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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參考設計

PMP22951 — 具有主動鉗位的 54-V、3-kW 相移式全橋參考設計

參考設計為 GaN 式 3-kW 相移式全橋 (PSFB) 轉換器。此設計二次側使用主動箝位，可減少同步整流器 (SR) MOSFET 的電壓應力，使用擁有更出色品質因數 (FoM) 的低電壓額定值 MOSFET。PMP22951 在一次側使用 30-mΩ GaN，以及針對同步整流器使用 100-V、1.8-mΩ GaN。利用 TMS320F280049C 即時微控制實現 PSFB 控制。PSFB 轉換器可在 140-kHz 切換頻率下運作，並在 385-V 輸入下達到 97.45% 的峰值效率。
Test report: PDF
參考設計

TIDA-00785 — 隔離式 GaN 驅動器參考設計

This reference design consists of a reinforced dualchannel digital isolator, a GaN gate driver, and isolated power supplies. This compact reference design is intended to control GaN in power supplies, DC-to-DC converters, synchronous rectification, solar inverters, and motor control. An open-loop (...)
Design guide: PDF
電路圖: PDF
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