Startseite Energiemanagement Gate-Treiber Halbbrückentreiber

UCC27710

AKTIV

Halbbrücken-Gate-Treiber, 0,5/1,0 A, 620 V, mit Verriegelung

Produktdetails

Bootstrap supply voltage (max) (V) 620 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 22 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 35 Fall time (ns) 16 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 620 Power switch IGBT, MOSFET Input supply voltage (min) (V) 10 Input supply voltage (max) (V) 22 Peak output current (A) 1 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 10 Rating Catalog Propagation delay time (µs) 0.1 Rise time (ns) 35 Fall time (ns) 16 Iq (mA) 0.25 Input threshold CMOS, TTL Channel input logic Noninverting Switch node voltage (V) -11 Features Interlock Driver configuration CMOS compatible, Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

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Technische Dokumentation

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Alle anzeigen 13
Typ Titel Datum
* Data sheet UCC27710 620-V, 0.5-A, 1.0-A High-Side Low-Side Gate Driver with Interlock datasheet (Rev. B) PDF | HTML 30 Aug 2018
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 04 Apr 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 Jan 2024
Application note How to Choose a Gate Driver for DC Motor Drives PDF | HTML 05 Okt 2023
Application note Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 08 Sep 2023
More literature Troubleshooting gate drive circuits in automotive and industrial applications 23 Mär 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Okt 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse PDF | HTML 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadti PDF | HTML 30 Mai 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage PDF | HTML 17 Apr 2018
EVM User's guide UCC27710EVM-005 Evaluation Module (Rev. A) 25 Okt 2017

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

UCC27710EVM-005 — UCC27710 620 V, 0,5 A, 1,0 A, Highside-Lowside-Gate-Treiber – Evaluierungsmodul

UCC27710EVM-005 is designed for evaluating UCC27710D, which is a 620V half bridge gate driver with adequate source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
Benutzerhandbuch: PDF
Simulationsmodell

UCC27710 PSpice Transient Model

SLUM591.ZIP (69 KB) - PSpice Model
Simulationsmodell

UCC27710 Unencrypted PSpice Transient Model

SLUM634.ZIP (3 KB) - PSpice Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (D) 8 Ultra Librarian

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