Inicio Gestión de la energía Power stages Etapas de potencia de nitruro de galio (GaN)

FET de GaN en encapsulado TOLL de 650 V y 35 mΩ con controlador y protección integrados

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Detalles del producto

VDS (max) (V) 650 RDS(on) (mΩ) 35 ID (max) (A) 20 Features Bottom-side cooled, Cycle-by-cycle overcurrent protection, Latched overcurrent protection, Over Current Protection, Slew Rate Control, Wide input voltage Rating Catalog Operating temperature range (°C) -40 to 175
VDS (max) (V) 650 RDS(on) (mΩ) 35 ID (max) (A) 20 Features Bottom-side cooled, Cycle-by-cycle overcurrent protection, Latched overcurrent protection, Over Current Protection, Slew Rate Control, Wide input voltage Rating Catalog Operating temperature range (°C) -40 to 175
TO-OTHER (KLA) 9 115.632 mm² 9.9 x 11.68
  • 650V 35mΩ GaN power FET with integrated gate driver
    • >200V/ns FET hold-off
    • Adjustable slew rates for optimization of switching performance and EMI mitigation
      • 10V/ns to 100V/ns turn-on slew rates
      • 10V/ns to full speed turn-off slew rates
    • Operates with supply pin and input logic pin voltage range from 9V to 26V
  • Robust Protection
    • Cycle-by-cycle overcurrent and latched short-circuit protection with <300ns response
    • Withstands 720V surge while hard-switching
    • Self-protection from internal overtemperature and UVLO monitoring
  • 9.8mm × 11.6mm TOLL package witht thermal pad
  • 650V 35mΩ GaN power FET with integrated gate driver
    • >200V/ns FET hold-off
    • Adjustable slew rates for optimization of switching performance and EMI mitigation
      • 10V/ns to 100V/ns turn-on slew rates
      • 10V/ns to full speed turn-off slew rates
    • Operates with supply pin and input logic pin voltage range from 9V to 26V
  • Robust Protection
    • Cycle-by-cycle overcurrent and latched short-circuit protection with <300ns response
    • Withstands 720V surge while hard-switching
    • Self-protection from internal overtemperature and UVLO monitoring
  • 9.8mm × 11.6mm TOLL package witht thermal pad

The LMG365xR035 GaN FET with integrated driver and protection is targeted at switch-mode power converters and enables designers to achieve new levels of power density and efficiency.

Adjustable gate driver strength allows the control of turn-on and maximum turn-off slew rates independently, which can be used to actively control EMI and optimize switching performance. Turn on slew rate can be varied from 10V/ns to 100V/ns, while the turn off slew rate can be limited from 10V/ns to a maximum based on the magnitude of load current. Protection features include under-voltage lockout (UVLO), cycle-by-cycle overcurrent limit, short-circuit and overtemperature protection. The LMG3651R035 provides a 5V LDO output on LDO5V pin that can be used to power external digital isolator. The LMG3656R035 includes the zero-voltage detection (ZVD) feature which provides a pulse output from the ZVD pin when zero-voltage switching is realized. The LMG3657R035 includes the zero-current detection (ZCD) feature that sets the ZCD pin high when the drain-to-source current is negative and transitions to low upon detecting the zero-crossing point.

The LMG365xR035 GaN FET with integrated driver and protection is targeted at switch-mode power converters and enables designers to achieve new levels of power density and efficiency.

Adjustable gate driver strength allows the control of turn-on and maximum turn-off slew rates independently, which can be used to actively control EMI and optimize switching performance. Turn on slew rate can be varied from 10V/ns to 100V/ns, while the turn off slew rate can be limited from 10V/ns to a maximum based on the magnitude of load current. Protection features include under-voltage lockout (UVLO), cycle-by-cycle overcurrent limit, short-circuit and overtemperature protection. The LMG3651R035 provides a 5V LDO output on LDO5V pin that can be used to power external digital isolator. The LMG3656R035 includes the zero-voltage detection (ZVD) feature which provides a pulse output from the ZVD pin when zero-voltage switching is realized. The LMG3657R035 includes the zero-current detection (ZCD) feature that sets the ZCD pin high when the drain-to-source current is negative and transitions to low upon detecting the zero-crossing point.

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Documentación técnica

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* Data sheet LMG365xR035 650V 35 mΩ GaN FET With Integrated Driver and Protection datasheet PDF | HTML 20 dic 2024
EVM User's guide LMG3650R035 Evaluation Module PDF | HTML 20 dic 2024

Diseño y desarrollo

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Tarjeta secundaria

LMG3650EVM-114 — Tarjeta secundaria LMG3650R035

El módulo de evaluación (EVM) LMG3650R035 configura dos transistores de efecto de campo (FET) de nitruro de galio (GaN) LMG3650R035 en un medio puente con protección contra sobretemperatura, protección contra sobrecorriente ciclo a ciclo, función de protección contra desaturación de cortocircuito (...)

Guía del usuario: PDF | HTML
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
TO-OTHER (KLA) 9 Ultra Librarian

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