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UCC21220A

ACTIVO

Controlador de puerta aislada de doble canal (4 A/6 A) y 3.0 kVrms, con pin de desactivación y UVLO

Detalles del producto

Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 6 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5
Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 6 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Supports basic and functional isolation
  • CMTI greater than 100V/ns
  • 4A peak source, 6A peak sink output
  • Switching parameters:
    • 40ns maximum propagation delay
    • 5ns maximum delay matching
    • 5.5ns maximum pulse-width distortion
    • 35µs maximum VDD power-up delay
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Operating temperature range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1 (planned)
    • 3000VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011 (planned)
  • Supports basic and functional isolation
  • CMTI greater than 100V/ns
  • 4A peak source, 6A peak sink output
  • Switching parameters:
    • 40ns maximum propagation delay
    • 5ns maximum delay matching
    • 5.5ns maximum pulse-width distortion
    • 35µs maximum VDD power-up delay
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Operating temperature range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1 (planned)
    • 3000VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011 (planned)

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 100V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, INA/B pin rejects input transient shorter than 5ns, both inputs and outputs can withstand –2V spikes for 200ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 100V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, INA/B pin rejects input transient shorter than 5ns, both inputs and outputs can withstand –2V spikes for 200ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

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Documentación técnica

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Tipo Título Fecha
* Data sheet UCC21220, UCC21220A 4A, 6A, Dual-Channel Basic and Functional Isolated Gate Drivers with High Noise Immunity datasheet (Rev. F) PDF | HTML 02 feb 2024
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 31 ene 2024
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 24 abr 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 22 jul 2019
User guide Gate Drive Voltage vs. Efficiency 25 abr 2019
Application brief How to Drive High Voltage GaN FETs with UCC21220A 06 mar 2019
White paper Impact of an isolated gate driver (Rev. A) 20 feb 2019
Application note Common Mode Transient Immunity (CMTI) for UCC2122x Isolated Gate Drivers 19 jul 2018
White paper Demystifying high-voltage power electronics for solar inverters 06 jun 2018
Application note Solar Inverter Layout Considerations for UCC21220 06 jun 2018
EVM User's guide UCC21220EVM-009 User's Guide (Rev. B) 12 abr 2018

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC21220EVM-009 — Módulo de evaluación UCC21220 de controlador de puerta aislada de doble canal (4 A y 6 A) y 3.0 kVrm

UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
Guía del usuario: PDF
Modelo de simulación

UCC21220AD PSpice Transient Model

SLUM649.ZIP (58 KB) - PSpice Model
Modelo de simulación

UCC21220AD Unencrypted PSpice Transient Model

SLUM650.ZIP (3 KB) - PSpice Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia

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This reference design converts a DC-input source in the range of 450 V to 780 V into non-isolated 390 V at 1.5 A. This is an alternative solution to SiC-FET and SiC-Diode buck converter, since the actual power stage uses only standard silicon components. In order to employ 600 V rated devices, the (...)
Test report: PDF
Esquema: PDF
Diseños de referencia

PMP40500 — Diseño de referencia de medio puente de 54 VCC de entrada y 12 V 42 A de salida<

This 12-V, 42-A output half-bridge reference design is for bus converters in wired networking campus and branch switches. The design features high efficiency and various fault protections (over-current and short-circuit). The design provides an efficiency comparison using 3 kVRMS basic and (...)
Test report: PDF
Esquema: PDF
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SOIC (D) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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