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UCC27332-Q1

ACTIVO

Controlador de compuerta de canal único de 9 A/9 A con VDD de 20 V y activación para automoción

Detalles del producto

Number of channels 1 Power switch IGBT, MOSFET Peak output current (A) 9 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 125 Rise time (ns) 14 Fall time (ns) 9 Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Channel input logic Non-Inverting Input negative voltage (V) -5 Rating Automotive Driver configuration Non-Inverting
Number of channels 1 Power switch IGBT, MOSFET Peak output current (A) 9 Input supply voltage (min) (V) 4 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 125 Rise time (ns) 14 Fall time (ns) 9 Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Channel input logic Non-Inverting Input negative voltage (V) -5 Rating Automotive Driver configuration Non-Inverting
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient Operating Temperature Range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Industry-standard pin-out
  • Typical 9-A sink, 9-A source output currents
  • Input pin capable of withstanding up to –5 V
  • Absolute maximum VDD voltage: 20 V
  • Wide VDD operating range from 4.5 V to 18 V
  • Available in 3-mm x 3-mm MSOP8 package
  • Typical 25-ns propagation delay
  • TTL compatible input thresholds
  • Operating junction temperature range of –40°C to 125°C
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient Operating Temperature Range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Industry-standard pin-out
  • Typical 9-A sink, 9-A source output currents
  • Input pin capable of withstanding up to –5 V
  • Absolute maximum VDD voltage: 20 V
  • Wide VDD operating range from 4.5 V to 18 V
  • Available in 3-mm x 3-mm MSOP8 package
  • Typical 25-ns propagation delay
  • TTL compatible input thresholds
  • Operating junction temperature range of –40°C to 125°C

The UCC27332-Q1 is a single channel, high-speed, low-side gate driver capable of effectively driving MOSFET and GaN power switches. UCC27332-Q1 has a typical peak drive strength of 9-A, which reduces the rise and fall times of the power switches, lowering switching losses and increasing efficiency. The UCC27332-Q1 device’s small propagation delay yields better power stage efficiency by improving the dead time optimization, pulse width utilization, control loop response, and transient performance of the system.

UCC27332-Q1 can handle –5-V on its input, which improves robustness in systems with moderate ground bouncing. An independent enable signal allows the power stage to be controlled independent of the main control logic. The gate driver can quickly shut off the power stage if there is a fault in the system (which requires the power train to be turned-off). The enable function also improves system robustness. Many high-frequency switching power supplies exhibit high frequency noise at the gate of the power device, which can get injected into the output pin of the gate driver and can cause the driver to malfunction. The UCC27332-Q1 performs well in such conditions due to its transient reverse current and reverse voltage capability.

The strong internal pulldown MOSFET holds the output low if the VDD voltage is below the specified power on reset threshold. This active pulldown feature further improves system robustness. The small 3-mm × 3mm MSOP package enables optimum gate driver placement and inproved layout. This small package also enables optimum gate driver placement and improved layout.

The UCC27332-Q1 is a single channel, high-speed, low-side gate driver capable of effectively driving MOSFET and GaN power switches. UCC27332-Q1 has a typical peak drive strength of 9-A, which reduces the rise and fall times of the power switches, lowering switching losses and increasing efficiency. The UCC27332-Q1 device’s small propagation delay yields better power stage efficiency by improving the dead time optimization, pulse width utilization, control loop response, and transient performance of the system.

UCC27332-Q1 can handle –5-V on its input, which improves robustness in systems with moderate ground bouncing. An independent enable signal allows the power stage to be controlled independent of the main control logic. The gate driver can quickly shut off the power stage if there is a fault in the system (which requires the power train to be turned-off). The enable function also improves system robustness. Many high-frequency switching power supplies exhibit high frequency noise at the gate of the power device, which can get injected into the output pin of the gate driver and can cause the driver to malfunction. The UCC27332-Q1 performs well in such conditions due to its transient reverse current and reverse voltage capability.

The strong internal pulldown MOSFET holds the output low if the VDD voltage is below the specified power on reset threshold. This active pulldown feature further improves system robustness. The small 3-mm × 3mm MSOP package enables optimum gate driver placement and inproved layout. This small package also enables optimum gate driver placement and improved layout.

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Documentación técnica

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Tipo Título Fecha
* Data sheet UCC27332-Q1 20-V, 9-A Single Channel Low Side Gate Driver with –5-V Input Capability For Automotive Application datasheet PDF | HTML 17 oct 2023
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 ene 2024
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 08 sep 2023
Certificate UCC27332Q1EVM EU Declaration of Conformity (DoC) 03 may 2023
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 nov 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 ene 2019

Diseño y desarrollo

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Placa de evaluación

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Guía del usuario: PDF
Placa de evaluación

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Guía del usuario: PDF | HTML
Herramienta de simulación

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia

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Test report: PDF
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HVSSOP (DGN) 8 Ultra Librarian

Pedidos y calidad

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  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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