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Drivers del lado de tierra

UCC27511A

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Controlador de puerta monocanal de 4 A/8 A con UVLO de 5 V, salidas divididas y manipulación de entr

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UCC27511A

ACTIVO
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Detalles del producto

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 8 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual inputs
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 8 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Split Output Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual inputs
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8
  • Input Pins Capable of Withstanding –5V Below GND pin
  • Low-Cost Gate-Driver Device Offering Superior Replacement of NPN and PNP Discrete Solutions
  • Strong Sink Current Offers Enhanced Immunity Against Miller Turnon
  • Split Output Configuration (Allows Easy and Independent Adjustment of Turnon and Turnoff Speeds)
  • Fast Propagation Delays (13ns typical)
  • Fast Rise and Fall Times (8ns and 7ns typical)
  • 4.5V to 18V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent of Supply Voltage)
  • Wide Hysteresis (1V typical) for High-Noise Immunity
  • Dual-Input Design (Choice of an Inverting (IN– Pin) or Non-Inverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin can be Used for Enable or Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
  • Input Pins Capable of Withstanding –5V Below GND pin
  • Low-Cost Gate-Driver Device Offering Superior Replacement of NPN and PNP Discrete Solutions
  • Strong Sink Current Offers Enhanced Immunity Against Miller Turnon
  • Split Output Configuration (Allows Easy and Independent Adjustment of Turnon and Turnoff Speeds)
  • Fast Propagation Delays (13ns typical)
  • Fast Rise and Fall Times (8ns and 7ns typical)
  • 4.5V to 18V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent of Supply Voltage)
  • Wide Hysteresis (1V typical) for High-Noise Immunity
  • Dual-Input Design (Choice of an Inverting (IN– Pin) or Non-Inverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin can be Used for Enable or Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage

The UCC27511A device is a compact gate driver that offers superior replacement of NPN and PNP discrete driver (buffer circuit) solutions. The UCC27511A device is a single-channel low-side, high-speed gate driver rated for MOSFETs, IGBTs, and emerging wide-bandgap power devices such as GaN. The device features fast rise times, fall times, and propagation delays, making the UCC27511A device suitable for high-speed applications. Its asymmetrical 4A peak source and 8A peak sink currents boost immunity against parasitic Miller turnon effect. The split output configuration enables easy and independent adjustment of rise and fall times using only two resistors and eliminating the need for an external diode. Features including wide input hysteresis and negative input voltage handling enhance transient immunity.

The UCC27511A device is a compact gate driver that offers superior replacement of NPN and PNP discrete driver (buffer circuit) solutions. The UCC27511A device is a single-channel low-side, high-speed gate driver rated for MOSFETs, IGBTs, and emerging wide-bandgap power devices such as GaN. The device features fast rise times, fall times, and propagation delays, making the UCC27511A device suitable for high-speed applications. Its asymmetrical 4A peak source and 8A peak sink currents boost immunity against parasitic Miller turnon effect. The split output configuration enables easy and independent adjustment of rise and fall times using only two resistors and eliminating the need for an external diode. Features including wide input hysteresis and negative input voltage handling enhance transient immunity.
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Documentación técnica

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* Data sheet UCC27511A Single-Channel High-Speed Low-Side Gate Driver With 4A Peak Source and 8A Peak Sink datasheet (Rev. A) PDF | HTML 17 ene 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 ene 2024
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 08 sep 2023
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 nov 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 ene 2019
Application brief Enable Function with Unused Differential Input 11 jul 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 mar 2018

Diseño y desarrollo

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Modelo de simulación

UCC27511A PSpice Transient Model

SLVMCJ5.ZIP (67 KB) - PSpice Model
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Modelo de simulación

UCC27511A TINA-TI Transient Reference Design

SLVMCJ7.TSC (814 KB) - TINA-TI Reference Design
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Modelo de simulación

UCC27511A TINA-TI Transient Spice Model

SLVMCJ6.ZIP (5 KB) - TINA-TI Spice Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOT-23 (DBV) 6 Ultra Librarian
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Pedidos y calidad

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  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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