The UCC2751xA-Q1 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC2751xA-Q1 family of devices sources and sinks high, peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 17 ns.
The UCC2751xA-Q1 family of devices provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.
The UCC2751xA-Q1 family of devices operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best in class switching characteristics, is especially suited for driving emerging wide band-gap power switching devices such as GaN power-semiconductor devices.
The input pin threshold of the UCC2751xA-Q1 family of devices is based on CMOS logic where the threshold voltage is a function of the VDD supply voltage. Typically, the input high threshold (VIN–H) is 55% VDD and the input low threshold (VIN–L) is 39% VDD. Wide hysteresis (16% VDD typically) between the high and low thresholds offers excellent noise immunity and allows users to introduce delays using RC circuits between the input PWM signal and the INx pin of the device.
The UCC2751xA-Q1 family of devices also features a floatable enable function on the EN pin. The EN pin can be left in a no-connect condition, which allows pin-to-pin compatibility between the UCC2751xA-Q1 family of devices and the TPS2828-Q1 or TPS2829-Q1 device, respectively. The enable pin threshold is a fixed voltage threshold and does not vary based on VDD pin bias voltage. Typically, the enable high threshold (VEN-H) is 2.1 V and the enable low threshold (VEN-L) is 1.25 V.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | UCC2751xA-Q1 Single-Channel High-Speed Low-Side Gate Driver With Negative Input Voltage Capability datasheet (Rev. B) | PDF | HTML | 31 ago 2014 |
| Application note | Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs | PDF | HTML | 22 ene 2024 | |
| Functional safety information | UCC27517A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 16 jun 2021 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 28 feb 2020 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 28 feb 2020 | ||
| Application brief | How to overcome negative voltage transients on low-side gate drivers' inputs | 18 ene 2019 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 29 oct 2018 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| SOT-23 (DBV) | 5 | Ultra Librarian |
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