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PCA9306

現行

2 位元雙向 400-kHz I2C/SMBus 電壓電平轉換器

產品詳細資料

Features Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 1.2 VCCA (max) (V) 3.3 VCCB (min) (V) 1.8 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
Features Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 1.2 VCCA (max) (V) 3.3 VCCB (min) (V) 1.8 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZT) 8 1.9404 mm² 1.98 x 0.98 SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X2SON (DQE) 8 1.4 mm² 1.4 x 1
  • 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I 2C Applications
  • I 2C and SMBus compatible
  • Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I 2C devices and multiple controllers
  • Allows voltage-level translation between
    • 1.2-V V REF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V V REF2
    • 1.8-V V REF1 and 2.5-V, 3.3-V, or 5-V V REF2
    • 2.5-V V REF1 and 3.3-V or 5-V V REF2
    • 3.3-V V REF1 and 5-V V REF2
  • Provides bidirectional voltage translation with no direction pin
  • Low 3.5-Ω ON-state resistance between input and output ports provides less signal distortion
  • Open-drain I 2C I/O ports (SCL1, SDA1, SCL2, and SDA2)
  • 5-V Tolerant I 2C I/O ports to support mixed-mode signal operation
  • High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
  • Lockup-free operation for isolation when EN = low
  • Flow-through pinout for ease of printed-circuit-board trace routing
  • Latch-up performance exceeds 100 mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 1000-V Charged-device model (C101)
  • 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I 2C Applications
  • I 2C and SMBus compatible
  • Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I 2C devices and multiple controllers
  • Allows voltage-level translation between
    • 1.2-V V REF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V V REF2
    • 1.8-V V REF1 and 2.5-V, 3.3-V, or 5-V V REF2
    • 2.5-V V REF1 and 3.3-V or 5-V V REF2
    • 3.3-V V REF1 and 5-V V REF2
  • Provides bidirectional voltage translation with no direction pin
  • Low 3.5-Ω ON-state resistance between input and output ports provides less signal distortion
  • Open-drain I 2C I/O ports (SCL1, SDA1, SCL2, and SDA2)
  • 5-V Tolerant I 2C I/O ports to support mixed-mode signal operation
  • High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
  • Lockup-free operation for isolation when EN = low
  • Flow-through pinout for ease of printed-circuit-board trace routing
  • Latch-up performance exceeds 100 mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 1000-V Charged-device model (C101)

The PCA9306 device is a dual bidirectional I 2C and SMBus voltage-level translator with an enable (EN) input, and is operational from 1.2-V to 3.3-V V REF1 and 1.8-V to 5.5-V V REF2.

The PCA9306 device allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (R ON) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

In addition to voltage translation, the PCA9306 device can be used to isolate a 400-kHz bus from a 100-kHz bus by controlling the EN pin to disconnect the slower bus during fast-mode communication.

The PCA9306 device is a dual bidirectional I 2C and SMBus voltage-level translator with an enable (EN) input, and is operational from 1.2-V to 3.3-V V REF1 and 1.8-V to 5.5-V V REF2.

The PCA9306 device allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (R ON) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

In addition to voltage translation, the PCA9306 device can be used to isolate a 400-kHz bus from a 100-kHz bus by controlling the EN pin to disconnect the slower bus during fast-mode communication.

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類型 標題 日期
* Data sheet PCA9306 Dual Bidirectional I2C Bus and SMBus Voltage-Level Translator datasheet (Rev. O) PDF | HTML 2023年 9月 6日
Application note PassFET Hang Time with TCA39306 I2C, I3C Level Translator PDF | HTML 2024年 9月 23日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Enabling AI Accelerators with Voltage Level Translation PDF | HTML 2024年 5月 1日
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024年 1月 9日
Certificate PCA9306EVM EU Declaration of Conformity (DoC) 2023年 6月 29日
Application brief Best Practices: I2C Devices on an I3C Shared Bus PDF | HTML 2023年 3月 30日
Application note How to Debug I2C PDF | HTML 2023年 3月 30日
Product overview Translate Voltages for I2C for PCA9306 LSF0102 TXS0102 PDF | HTML 2022年 9月 14日
EVM User's guide PCA9306 I2C Buffer Evaluation Module 2018年 10月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Technical article Intro to I2C: what the Internet doesn’t tell you PDF | HTML 2016年 11月 24日
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 2016年 9月 7日
Selection guide I2C Infographic Flyer 2015年 12月 3日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
Application note Understanding the I2C Bus PDF | HTML 2015年 6月 30日
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015年 5月 15日
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015年 2月 13日
Application note Programming Fun Lights With TI's TCA6507 2007年 11月 30日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

PCA9306EVM — PCA9306 I2C 轉換器評估模組

This EVM can be used to evaluate the PCA9306 product in the DCU package. The I2C buses are easily accessed via SDA_1, SCL_1, SDA_2, and SCL_2 test points, and symmetrically laid out for optimal performance. All IC signals are available through test point connections.
使用指南: PDF
TI.com 無法提供
開發板

TCA6507EVM — TCA6507 7 位元脈衝波調變 LED 驅動器評估模組

TCA6507 EVM 配備 RGB LED 和 4 個綠色 LED 測試裝置的功能。板載位準移位器用於在主機與 TCA6507 的不同邏輯位準之間轉換。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

HSPICE MODEL OF PCA9306 (Rev. A)

SCEJ212A.ZIP (81 KB) - HSpice Model
模擬型號

PCA9306 IBIS Model (Rev. A)

SCPM002A.ZIP (54 KB) - IBIS Model
設計工具

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Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

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Design guide: PDF
電路圖: PDF
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電路圖: PDF
參考設計

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This is a reference design based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC).  This design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037.  It includes (...)
Design guide: PDF
電路圖: PDF
參考設計

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Design guide: PDF
電路圖: PDF
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電路圖: PDF
參考設計

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Design guide: PDF
電路圖: PDF
參考設計

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電路圖: PDF
參考設計

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Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZT) 8 Ultra Librarian
SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian
X2SON (DQE) 8 Ultra Librarian

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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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