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UCC21520

現行

採用 DW 封裝且具有雙輸入和停用針腳的 5.7kVRMS 4A/6A 雙通道隔離式閘極驅動器

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UCC21550 現行 具有 IGBT 專用 DIS 和 DT 針腳的 4A/6A、5-kVRMS 雙通道隔離式閘極驅動器 Tighter VCCI range supporting digital controller thresholds. New DT equation. Increased CMTI and wider operating temperature range.

UCC21520

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, Enable, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 6.5, 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 18 Propagation delay time (µs) 0.019 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 6 Fall time (ns) 7 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Junction temperature range –40 to +150°C
  • Switching parameters:
    • 33ns typical propagation delay
    • 20ns minimum pulse width
    • 6ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Surge immunity up to 10kV
  • 4A peak source, 6A peak sink output
  • 3V to 18V input VCCI range to interface with both digital and analog controllers
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • Programmable overlap and dead time
  • Fast disable for power sequencing
  • Safety-related certifications (planned):
    • 8000VPK reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5.7kVRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022
  • Junction temperature range –40 to +150°C
  • Switching parameters:
    • 33ns typical propagation delay
    • 20ns minimum pulse width
    • 6ns maximum pulse-width distortion
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Surge immunity up to 10kV
  • 4A peak source, 6A peak sink output
  • 3V to 18V input VCCI range to interface with both digital and analog controllers
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • Programmable overlap and dead time
  • Fast disable for power sequencing
  • Safety-related certifications (planned):
    • 8000VPK reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5.7kVRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022

The UCC21520 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.

The input side is isolated from the two output drivers by a 5.7kVRMS reinforced isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25V. A wide input VCCI range from 3V to 18V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 enables high efficiency, high power density, and robustness.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21520 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.

The input side is isolated from the two output drivers by a 5.7kVRMS reinforced isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.

Each device accepts VDD supply voltages up to 25V. A wide input VCCI range from 3V to 18V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 enables high efficiency, high power density, and robustness.

Each device accepts VDD supply voltages up to 25 V. A wide input VCCI range from 3 V to 18 V makes the driver suitable for interfacing with both analog and digital controllers. All supply voltage pins have under voltage lock-out (UVLO) protection.

With all these advanced features, the UCC21520 and the UCC21520A enable high efficiency, high power density, and robustness in a wide variety of power applications.
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類型 標題 日期
* Data sheet UCC21520, UCC21520A 4A, 6A, 5.7kVRMS Isolated Dual-Channel Gate Drivers datasheet (Rev. F) PDF | HTML 2024年 11月 8日
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 2024年 2月 29日
White paper Understanding failure modes in isolators (Rev. B) PDF | HTML 2024年 1月 29日
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 2024年 1月 25日
Technical article For efficiencies’ sake – how to integrate bidirectional power flow into your UPS design (part 1) PDF | HTML 2024年 1月 11日
Certificate UCC215xx CQC Certificate of Product Certification 2023年 8月 17日
Certificate UCC21520 CQC Certificate of Product Certification (Rev. A) 2023年 8月 16日
Certificate UL Certification E181974 Vol 4. Sec 7 (Rev. C) 2022年 12月 2日
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021年 12月 16日
EVM User's guide Using the UCC21520EVM-286, UCC21521CEVM-286, and UCC21530EVM286 User's Guide (Rev. C) PDF | HTML 2021年 10月 21日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
E-book E-book: An engineer’s guide to industrial robot designs 2020年 2月 12日
Certificate CSA Product Certificate (Rev. A) 2019年 8月 15日
White paper Impact of an isolated gate driver (Rev. A) 2019年 2月 20日
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 2018年 5月 16日
Technical article For efficiencies’ sake – how to integrate bidirectional power flow (part 2) PDF | HTML 2017年 9月 19日
Technical article Making a solar inverter more reliable than the sun PDF | HTML 2017年 8月 1日
White paper Cities grow smarter through innovative semiconductor technologies 2017年 7月 7日
Technical article Pile on to a charger – my EV needs power PDF | HTML 2016年 12月 20日
Technical article Don't forget the gate driver: it’s the muscle PDF | HTML 2016年 9月 20日
Technical article Staying cool, efficiently PDF | HTML 2016年 8月 22日
Technical article How to reduce system cost in a three-phase IGBT-based inverter design PDF | HTML 2016年 8月 8日
Technical article Why is the cloud isolated? PDF | HTML 2016年 7月 18日
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 2016年 7月 5日

設計與開發

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開發板

TIEVM-VIENNARECT — 使用 C2000™ MCU 且基於 Vienna 整流器的三相功率因數校正評估模組

The Vienna rectifier power topology is used in high power three phase power factor (AC-DC) applications such as off-board electric vehicle (EV) chargers and telecom rectifiers. This design illustrates how to control the power stage using C2000™ MCUs. This design uses an HSEC180 controlCARD (...)
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開發板

UCC21520EVM-286 — UCC21520 4A/6A 隔離式雙通道閘極驅動器評估模組

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)

使用指南: PDF | HTML
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模擬型號

UCC21520 PSpice Transient Model

SLUM544.ZIP (59 KB) - PSpice Model
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模擬型號

UCC21520 TINA-TI Reference Design

SLUM552.TSC (168 KB) - TINA-TI Reference Design
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模擬型號

UCC21520 TINA-TI Transient Spice Model

SLUM551.ZIP (23 KB) - TINA-TI Spice Model
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模擬型號

UCC21520 Unencrypted PSpice Transient Model

SLUM543.ZIP (3 KB) - PSpice Model
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計算工具

SLURAZ5 — UCC21520 Bootstrap Calculator 1.0

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產品
隔離式閘極驅動器
UCC21220 — 適用於 MOSFET 和 GaNFET 且具有停用針腳和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器 UCC21222 — 具有停用針腳、可編程失效時間和 8V UVLO 的 3.0kVrms、4A/6A 雙通道隔離式閘極驅動器 UCC21520 — 採用 DW 封裝且具有雙輸入和停用針腳的 5.7kVRMS 4A/6A 雙通道隔離式閘極驅動器 UCC21521 — 採用雙輸入、啟用功能、8V UVLO 和 LGA 封裝的 5.7kVrms、4A/6A 雙通道絕緣式閘極驅動器
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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參考設計

TIDM-1000 — 採用 C2000 MCU 的 Vienna 整流器式三相功率因數校正參考設計

Vienna rectifier power topology is used in high power three phase power factor (AC-DC) applications such as off board EV chargers and telecom rectifiers. Control design of the rectifier can be complex. This design illustrates a method to control the power stage using C2000™ microcontrollers (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01540 — 使用具有內建失效時間插入功能的閘極驅動器的三相反相器參考設計

The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01541 — 適用於三相逆變器的高頻寬相位電流和直流鏈路電壓感測參考設計

The TIDA-01541 reference design reduces system cost and enables a compact design for isolated phase current and DC link voltage measurement in three-phase inverters, while achieving high bandwidth and sensing accuracy. The output of the isolated amplifiers is interfaced to the internal ADC of the (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01159 — 精巧的半橋式強化絕緣式閘極驅動器參考設計

This reference design is a half-bridge isolated gated driver used in driving power stages of UPS, inverters, server and telecom applications. This reference design is based on the UCC21520 reinforced insulated gate driver and is capable of driving MOSFETs and SiC-FETs. The design (...)
Design guide: PDF
電路圖: PDF
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