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低壓側驅動器

UCC27517A

現行

具有 5-V UVLO 和負輸入電壓處理功能的 4-A/4-A 單通道閘極驅動器

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產品規格表

UCC27517A

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN- pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to
    +140°C
  • 5-Pin DBV (SOT-23) Package Option

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27517A single-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27517A is capable of sourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A device is capable of handling –5 V at input.

The UCC27517A provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A is designed to operate over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

UCC27517A features a dual input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27517A device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
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類型 標題 日期
* Data sheet UCC27517A Single-Channel High-Speed Low-Side Gate Driver with Negative Input Voltage Capability (with 4-A Peak Source and Sink) datasheet (Rev. C) PDF | HTML 2015年 8月 31日
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 2024年 4月 4日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application note Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023年 9月 8日
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021年 11月 10日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Application brief Enable Function with Unused Differential Input 2018年 7月 11日
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018年 3月 16日
Technical article How to achieve higher system efficiency- part two: high-speed gate drivers PDF | HTML 2017年 1月 31日
White paper Advancing Power Supply Solutions Through the Promise of GaN 2015年 2月 24日
More literature Design Review of a Full-Featured 350-W Offline Power Converter 2013年 10月 29日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice Model
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模擬型號

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI Reference Design
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模擬型號

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice Model
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模擬型號

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
參考設計

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TIDA-00707 is a 1-kW, compact (100mmX80mm) power factor converter (PFC) designed for telecom, server, and industrial power supplies. This reference design is a continuous conduction mode boost converter, implemented using a UCD3138A Digital Power Supply controller with all protections built-in. (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00443 — 適用於逆變器饋電驅動且效率 98% 的 230V、900W、PFC 參考設計

TIDA-00443 is a 900W power factor regulator converter designed for inverter fed BLDC/PMSM motor based appliances. This reference design is a continuous conduction mode boost converter implemented using UCC28180 PFC controller and with all the necessary protections built-in. The design supports a (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDM-02010 — 用於暖通空調的數位交錯式 PFC 雙馬達控制參考設計

TIDM-02010 參考設計是一款 1.5-kW 雙馬達驅動和 PFC 控制參考設計，適用於暖通空調應用的變頻空調室外機控制器；其中展示實作無感測器 3 相 PMSM 向量控制的方法，適用於壓縮機和風扇馬達驅動器，以及數位交錯式升壓 PFC，可透過單一 C2000™ 微控制器滿足新的效率標準。此參考設計提供的軟硬體皆經過測試且隨時可用，有助於加快開發至上市時間。參考設計包括硬體設計檔案和軟體程式碼。
Design guide: PDF
參考設計

PMP30595 — 適用於教學用途的通用降壓轉換器參考設計

This universal buck converter reference design features a voltage mode buck converter in combination with a tiny, onboard electronics load to demonstrate the relationship in-between small-signal analysis in frequency domain (network analysis) and large signal analysis in time domain (transient (...)
Test report: PDF
電路圖: PDF
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