Startseite Energiemanagement Gate-Treiber Low-Side-Treiber

UC1707-SP

AKTIV

Strahlungsbeständiger 1,5-A/1,5-A-QMLV-Zweikanal-Gate-Treiber mit 40-V-VDD und Ausgangsverriegelu

Produktdetails

Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 1.5 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 40 Features Analog Shutdown with Optional Latch, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 40 Input threshold TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 1.5 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 40 Features Analog Shutdown with Optional Latch, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 40 Input threshold TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CFP (W) 16 69.319 mm² 10.3 x 6.73 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Rad-Tolerant: 50 kRad (Si) for 5962-
    8761903VEA, 5962-8761903VFA(1)
  • QML-V Qualified, SMD
    (5962-8761901VEA, 5962-8761903VEA,
    5962-8761903VFA, 5962-8761901V2A)
  • Two Independent Drivers
  • 1.5-A Totem Pole Outputs
  • Inverting and Non-Inverting Inputs
  • 40-ns Rise and Fall Into 1000 pF
  • High-Speed, Power MOSFET Compatible
  • Low Cross-Conduction Current Spike
  • Analog Shutdown With Optional Latch
  • Low Quiescent Current
  • 5-V to 40-V Operation
  • Thermal Shutdown Protection
  • 16-Pin Dual-In-Line Package
  • Rad-Tolerant: 50 kRad (Si) for 5962-
    8761903VEA, 5962-8761903VFA(1)
  • QML-V Qualified, SMD
    (5962-8761901VEA, 5962-8761903VEA,
    5962-8761903VFA, 5962-8761901V2A)
  • Two Independent Drivers
  • 1.5-A Totem Pole Outputs
  • Inverting and Non-Inverting Inputs
  • 40-ns Rise and Fall Into 1000 pF
  • High-Speed, Power MOSFET Compatible
  • Low Cross-Conduction Current Spike
  • Analog Shutdown With Optional Latch
  • Low Quiescent Current
  • 5-V to 40-V Operation
  • Thermal Shutdown Protection
  • 16-Pin Dual-In-Line Package

The UC1707-SP power driver is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices – particularly power MOSFETs. The UC1707-SP contains two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin.

Supply voltage for both VIN and VC can independently range from 5 to 40 V.

The UC1707-SP power driver is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices – particularly power MOSFETs. The UC1707-SP contains two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin.

Supply voltage for both VIN and VC can independently range from 5 to 40 V.

Herunterladen Video mit Transkript ansehen Video

Ähnliche Produkte, die für Sie interessant sein könnten

Selbe Funktionalität wie der verglichene Baustein bei abweichender Anschlussbelegung
UC1705-SP AKTIV Weltraumtauglicher 1,5-A/1,5-A-QMLV-Einkanal-Gate-Treiber mit 40-V-VDD und Ausgangsverriegelung Higher drive dual-channel product useful in a wide range of applications
Ähnliche Funktionalität wie verglichener Baustein
NEU TPS7H6003-SP AKTIV Strahlungsfester 200-V-QMLV-Halbbrücken-GaN-Gate-Treiber Dual low-side implementation for GaN

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 18
Typ Titel Datum
* Data sheet UC1707-SP Dual-Channel Power Driver datasheet (Rev. A) PDF | HTML 21 Mär 2016
* Radiation & reliability report UC1707-SP (5962-8761903VEA) Neutron Displacement Damage Characterization 30 Nov 2017
* SMD UC1707-SP SMD 5962-87619 08 Jul 2016
* Radiation & reliability report UC1707-SP ELDRS Report 31 Mär 2015
* Radiation & reliability report UC1707-SP SEE Report 31 Mär 2015
Application brief DLA Approved Optimizations for QML Products (Rev. B) PDF | HTML 23 Okt 2024
Selection guide TI Space Products (Rev. J) 12 Feb 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 Jan 2024
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note QML flow, its importance, and obtaining lot information (Rev. C) 30 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Okt 2022
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21 Aug 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form PDF | HTML 18 Mai 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
E-book Radiation Handbook for Electronics (Rev. A) 21 Mai 2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationsmodell

UC1707 Unencrypted PSpice Transient Model

SLUM648.ZIP (3 KB) - PSpice Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
CDIP (J) 16 Ultra Librarian
CFP (W) 16 Ultra Librarian
LCCC (FK) 20 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos