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UCC21540

ACTIVO

Controlador de puerta aislada de doble canal (4 A/6 A) y 5.7 kVrms con entradas dobles, pin DT y UVL

Se encuentra disponible una versión más nueva de este producto

open-in-new Comparar alternativas
Reemplazo con funcionalidad mejorada del dispositivo comparado
NUEVO UCC21550 ACTIVO Controlador de puerta aislado de 4 A a 6 A, 5 kVRMS y canal doble con pines DIS y DT para IGBT y SiC Improved CMTI, faster VDD startup

Detalles del producto

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1414 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1414 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 1414 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWK) 14 106.09 mm² 10.3 x 10.3
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4A peak source and 6A peak sink output
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • CMTI greater than 125V/ns
  • Switching parameters:
    • 33ns typical propagation delay
    • 6ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications (planned):
    • 8000VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5700VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022
  • Wide body package options
    • DW SOIC-16: pin-2-pin to UCC21520
    • DWK SOIC-14: 3.3 mm Ch-2-Ch spacing
  • Up to 4A peak source and 6A peak sink output
  • Up to 18V VDD output drive supply
    • 5V and 8V VDD UVLO options
  • CMTI greater than 125V/ns
  • Switching parameters:
    • 33ns typical propagation delay
    • 6ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Resistor-programmable dead time
  • TTL and CMOS compatible inputs
  • Safety-related certifications (planned):
    • 8000VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5700VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2022

The UCC2154x is an isolated dual channel gate driver family designed with up to 4 A/6 A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing, which facilitates higher bus voltage.

The UCC2154x family can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.

The UCC2154x is an isolated dual channel gate driver family designed with up to 4 A/6 A peak source/sink current to drive power MOSFET, IGBT, and GaN transistors. UCC2154x in DWK package also offers 3.3-mm minimum channel-to-channel spacing, which facilitates higher bus voltage.

The UCC2154x family can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5.7-kVRMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and negative voltage handling for up to –5-V spikes for 50 ns on input pins. All supplies have UVLO protection.

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Pin por pin con la misma funcionalidad que el dispositivo comparado
UCC21542 ACTIVO Controlador de puerta aislada de doble canal (4 A/6 A) y 5.7 kVrms con UVLO de 8 V y opción de separ Non-Programmable deadtime version

Documentación técnica

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* Data sheet UCC2154x Reinforced Isolation Dual-Channel Gate Driver With 3.3mm Channel-to-Channel Spacing Option datasheet (Rev. E) PDF | HTML 08 nov 2024
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 29 feb 2024
White paper Understanding failure modes in isolators (Rev. B) PDF | HTML 29 ene 2024
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 25 ene 2024
White paper Addressing High-Volt Design Challenges w/ Reliable and Affordable Isolation Tech (Rev. C) PDF | HTML 26 sep 2023
Certificate UCC21540 CQC Certificate of Product Certification 17 ago 2023
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021
Certificate FPPT2 - Nonoptical Isolating Devices UL 1577 Certificate of Compliance 26 oct 2021
Certificate CQC19001226951 05 feb 2021
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 24 abr 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 22 jul 2019
User guide Gate Drive Voltage vs. Efficiency 25 abr 2019
White paper Impact of an isolated gate driver (Rev. A) 20 feb 2019
EVM User's guide Using the UCC21540EVM 27 jul 2018
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 may 2018
White paper Cities grow smarter through innovative semiconductor technologies 07 jul 2017
Application note UCC21520, a Universal Isolated Gate Driver with Fast Dynamic Response (Rev. A) PDF | HTML 05 jul 2016

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC21540EVM — Módulo de evaluación de controlador de puerta aislada de doble canal de 5.0 kVrms con separación ent

UCC21540EVM is designed for evaluating UCC21540, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM serves as a reference design for driving power MOSFETs with up to 18V drive voltage, UCC21540 pin function identification, components (...)
Guía del usuario: PDF
Modelo de simulación

UCC21540 PSpice Transient Model

SLUM656.ZIP (19 KB) - PSpice Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)

Muchos diseños de referencia de TI incluyen UCC21540

Utilice nuestra herramienta de selección de diseños de referencia para revisar e identificar los diseños que mejor se adaptan a su aplicación y parámetros.

Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (DW) 16 Ultra Librarian
SOIC (DWK) 14 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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